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| 型号： | UPD753108GK-XXX-9ET |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 12 X 12 MM, PLASTIC, TQFP-64 |
| 文件页数： | 11/100页 |
| 文件大小： | 736K |
| 代理商： | UPD753108GK-XXX-9ET |
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16
PD753104, 753106, 753108
Data Sheet U10086EJ5V1DS
4. SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE
4.1 Difference Between Mk I Mode and Mk II Mode
The CPU of the
PD753108 has the following two modes: Mk I and Mk II, either of which can be selected.
The mode can be switched by bit 3 of the stack bank select register (SBS).
Mk I mode:
Upward compatible with the
PD75308B. Can be used in the 75XL CPU with a ROM capacity
of up to 16 KB.
Mk II mode: Incompatible with the
PD75308B. Can be used in all the 75XL CPU’s including those products
whose ROM capacity is more than 16 KB.
Table 4-1. Differences Between Mk I Mode and Mk II Mode
Mk I Mode
Mk II Mode
Number of stack bytes
2 bytes
3 bytes
for subroutine instructions
BRA !addr1 instruction
Not available
Available
CALLA !addr1 instruction
CALL !addr instruction
3 machine cycles
4 machine cycles
CALLF !faddr instruction
2 machine cycles
3 machine cycles
Caution The Mk II mode supports a program area exceeding 16 KB for the 75X and 75XL Series.
Therefore, this mode is effective for enhancing software compatibility with products
exceeding 16 KB.
When the Mk II mode is selected, the number of stack bytes used during execution of
subroutine call instructions increases by one byte per stack compared to the Mk I mode.
When the CALL !addr and CALLF !faddr instructions are used, the machine cycle
becomes longer by one machine cycle.
Therefore, use the Mk I mode if the RAM
efficiency and processing performance are more important than software compatibility.
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