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| 型号： | UPD780021AYGC-XXX-8BS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8.38 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 14 X 14 MM, PLASTIC, LQFP-64 |
| 文件页数： | 9/96页 |
| 文件大小： | 723K |
| 代理商： | UPD780021AYGC-XXX-8BS |
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PD780021A, 780022A, 780023A, 780024A, 780021AY, 780022AY, 780023AY, 780024AY
Data Sheet U14042EJ4V0DS
3.1 Port Pins (2/2)
Pin Name
I/O
Function
After
Alternate
Reset
Function
P70
I/O
Port 7
Input
TI00/TO0
P71
6-bit I/O port
TI01
P72
Input/output can be specified in 1-bit units.
TI50/TO50
P73
An on-chip pull-up resistor can be used by setting software.
TI51/TO51
P74
PCL
P75
BUZ
3.2 Non-Port Pins (1/2)
Pin Name
I/O
Function
After
Alternate
Reset
Function
INTP0
Input
External interrupt request input for which the valid edge (rising edge,
Input
P00
INTP2
falling edge, or both rising and falling edges) can be specified
P01
INTP2
P02
INTP3
P03/ADTRG
SI30
Input
Serial interface serial data input
Input
P20
SI31Note 1
P34
SO30
Output
Serial interface serial data output
Input
P21
SO31Note 1
P35
SDA0Note 2
I/O
Serial Interface serial data input/output
Input
P32
SCK30
I/O
Serial interface serial clock input/output
Input
P22
SCK31Note 1
P36
SCL0Note 2
P33
RxD0
Input
Serial data input for asynchronous serial interface
Input
P23
TxD0
Output
Serial data output for asynchronous serial interface
Input
P24
ASCK0
Input
Serial clock input for asynchronous serial interface
Input
P25
TI00
Input
External count clock input to 16-bit timer/event counter 0
Input
P70/TO0
Capture trigger input to capture register 01 (CR01) of 16-bit timer/event counter 0
TI01
Capture trigger input to capture register 00 (CR00) of 16-bit timer/event counter 0
P71
TI50
External count clock input to 8-bit timer/event counter 50
P72/TO50
TI51
External count clock input to 8-bit timer/event counter 51
P73/TO51
TO0
Output
16-bit timer/event counter 0 output
Input
P70/TI00
TO50
8-bit timer/event counter 50 output (also used for 8-bit PWM output)
Input
P72/TI50
TO51
8-bit timer/event counter 51 output (also used for 8-bit PWM output)
P73/TI51
PCL
Output
Clock output (for trimming of main system clock and subsystem clock)
Input
P74
BUZ
Output
Buzzer output
Input
P75
AD0 to AD7
I/O
Lower address/data bus for expanding memory externally
Input
P40 to P47
A8 to A15
Output
Higher address bus for expanding memory externally
Input
P50 to P57
RD
Output
Strobe signal output for reading from external memory
Input
P64
WR
Strobe signal output for writing to external memory
P65
WAIT
Input
Wait insertion at external memory access
Input
P66
ASTB
Output
Strobe output that externally latches address information output to
Input
P67
ports 4 and 5 to access external memory
Notes 1. SI31, SO31, and SCK31 are incorporated only in the
PD780024A Subseries.
2. SDA0 and SCL0 are incorporated only in the
PD780024AY Subseries.
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