CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 00 TO 02
User’s Manual U13952EJ3V1UD
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7.4.2 Operation as external event counter (timer 00 and timer 01 only)
The external event counter counts the number of external clock pulses input to the TI0/P24/INTP0 and
TI1/P25/INTP1 pins by using 8-bit timer counters 00 and 01 (TM00 and TM01).
To operate 8-bit timer/event counters 00 and 01 as an external event counter, make the settings in the following
order.
<1> Set P24 and P25 to input mode (PM24 = 1, PM25 = 1)
<2> Set 8-bit timer counter 0n (TM0n) to operation-disabled (TCE0n (bit 7 of 8-bit timer mode control register 0n
(TMC0n)) = 0)
<3> Specify the rising edge/falling edge of TIn (see Tables 7-6 and 7-7)
<4> Set the count value to CR0n
<5> Set TM0n to operation-enabled (TCE0n = 1)
Each time the valid edge specified by bit 1 (TCL0n0) of TMC0n is input, the value of 8-bit timer counter 0n (TM0n)
is incremented.
When the count value of TM0n matches the value set to CR0n, the value of TM0n is cleared to 00H and TM0n
continues counting. At the same time, an interrupt request signal (INTTM0n) is generated.
Figure 7-10 shows the timing of external event counter operation (with rising edge specified).
Caution
When the setting of the count clock using TMC0n and the setting of the TM0n to operation-
enable using an 8-bit memory manipulation instruction are performed at the same time, an error
of one clock or more may occur in the first cycle after the timer is started. Because of this,
when the 8-bit timer/event counter operates as an external event counter, be sure to make the
settings in the order described above.
Remark
n = 0, 1
Figure 7-10. External Event Counter Operation Timing (with Rising Edge Specified)
TIn pin input
TM0n count value
CR0n
TCE0n
INTTM0n
00
01
02
03
04
05
N – 1
N
00010203
N
Remarks 1. N = 00H to FFH
2. n = 0, 1