参数资料
型号: UPD78F0534FC(T)-AA1-A
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PBGA64
封装: 5 X 5 MM, LEAD FREE, PLASTIC, FLGA-64
文件页数: 24/52页
文件大小: 3774K
代理商: UPD78F0534FC(T)-AA1-A
CHAPTER 1 OUTLINE
Preliminary User’s Manual U17260EJ3V1UD
30
1.7 Outline of Functions
(1/2)
Item
PD78F0531 PD78F0532 PD78F0533 PD78F0534 PD78F0535 PD78F0536 PD78F0537 PD78F0537D
Flash memory
(self-programming
supported)
Note 1
16 K
24 K
32 K
48 K
60 K
96 K
128 K
Memory bank
Note 2
4
6
High-speed RAM
Note 1
768
1 K
Internal
memory
(bytes)
Expansion RAM
Note 1
1 K
2 K
4 K
6 K
Memory space
64 KB
High-speed system
clock
X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
1 to 20 MHz: VDD = 4.0 to 5.5 V, 1 to 10 MHz: VDD = 2.7 to 5.5 V,
1 to 5 MHz: VDD = 1.8 to 5.5 V
Main system
clock
(oscillation
frequency)
Internal high-speed
oscillation clock
Internal oscillation
8 MHz (TYP.): VDD = 1.8 to 5.5 V
Subsystem clock
(oscillation frequency)
XT1 (crystal) oscillation, external subsystem clock input (EXCLKS)
32.768 kHz (TYP.): VDD = 1.8 to 5.5 V
Internal low-speed oscillation clock
(for TMH1, WDT)
Internal oscillation
240 kHz (TYP.): VDD = 1.8 to 5.5 V
General-purpose registers
8 bits
× 32 registers (8 bits × 8 registers × 4 banks)
0.1
s (high-speed system clock: @ fXH = 20 MHz operation)
0.25
s (TYP.) (internal high-speed oscillation clock: @ fRH = 8 MHz (TYP.) operation)
Minimum instruction execution time
122
s (subsystem clock: @ fSUB = 32.768 kHz operation)
Instruction set
8-bit operation, 16-bit operation
Multiply/divide (8 bits
× 8 bits, 16 bits ÷ 8 bits)
Bit manipulate (set, reset, test, and Boolean operation)
BCD adjust, etc.
I/O ports
Total:
55
CMOS I/O:
50
CMOS output:
1
N-ch open-drain I/O (6 V tolerance): 4
Timers
16-bit timer/event counter: 1
channel
8-bit timer/event counter: 2
channels
8-bit timer: 2 channels
Watch timer: 1 channel
Watchdog timer: 1 channel
16-bit timer/event counter: 2 channels
8-bit timer/event counter: 2 channels
8-bit timer: 2 channels
Watch timer: 1 channel
Watchdog timer: 1 channel
Timer outputs
5 (PWM output: 4, PPG output: 1) 6 (PWM output: 4, PPG output: 2)
Clock output
156.25 kHz, 312.5 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
(peripheral hardware clock: @ fPRS = 20 MHz operation)
32.768 kHz (subsystem clock: @ fSUB = 32.768 kHz operation)
Buzzer output
2.44 kHz, 4.88 kHz, 9.77 kHz, 19.54 kHz
(peripheral hardware clock: @ fPRS = 20 MHz operation)
A/D converter
10-bit resolution
× 8 channels (AVREF = 2.3 to 5.5 V)
Notes 1. The internal flash memory capacity, internal high-speed RAM capacity, and internal expansion RAM
capacity can be changed using the internal memory size switching register (IMS) and the internal
expansion RAM size switching register (IXS).
2. Banks to be used can be changed using the bank select register (BANK).
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