参数资料
型号: UPD78F9212GR-JJG-A
厂商: Renesas Electronics America
文件页数: 100/175页
文件大小: 0K
描述: MCU 8BIT 4KB FLASH MEM 16-SSOP
标准包装: 1
系列: 78K0S/Kx1+
核心处理器: 78K0S
芯体尺寸: 8-位
速度: 10MHz
外围设备: LVD,POR,PWM,WDT
输入/输出数: 13
程序存储器容量: 4KB(4K x 8)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 16-SSOP(0.173",4.40mm 宽)
包装: 托盘
其它名称: 972-1046
UPD78F9212GR-JJG-A-ND
CHAPTER 2 PIN FUNCTIONS
User’s Manual U16994EJ6V0UD
28
2.2.2 P32 and P34 (Port 3)
P32 is a 1-bit I/O port. In addition to the function as an I/O port pin, this pin also has a function to input an external
interrupt request signal.
P34 is a 1-bit input-only port. This pin is also used as a RESET pin, and when the power is turned on, this is the
reset function.
For the setting method for pin functions, see CHAPTER 15 OPTION BYTE.
When P34 is used as an input port pin, connect the pull-up resistor.
P32 and P34 can be set to the following operation modes in 1-bit units.
(1)
Port mode
P32 functions as a 1-bit I/O port. This pin can be set to the input or output mode by using port mode register 3
(PM3). In addition, an on-chip pull-up resistor can be connected to the port by using pull-up resistor option
register 3 (PU3).
P34 functions as a 1-bit input-only port.
(2)
Control mode
P32 functions as an external interrupt request input pin (INTP1) for which the valid edge (rising edge, falling
edge, or both rising and falling edges) can be specified.
2.2.3 P40 to P47 (Port 4)
P40 to P47 constitute an 8-bit I/O port. Each bit of this port can be set to the input or output mode by using port
mode register 4 (PM4). In addition, an on-chip pull-up resistor can be connected to the port by using pull-up resistor
option register 4 (PU4).
2.2.4 RESET
This pin inputs an active-low system reset signal.
When the power is turned on, this is the reset function,
regardless of the option byte setting.
2.2.5 X1 and X2
These pins connect an oscillator to oscillate the X1 input clock.
X1 and X2 also function as the P23/ANI3 and P22/ANI2, respectively. For the setting method for pin functions, see
CHAPTER 15 OPTION BYTE.
Supply an external clock to X1.
Caution
The P22/X2/ANI2 and P23/X1/ANI3 pins are pulled down during reset.
2.2.6 VDD
This is the positive power supply pin.
In
μPD78F921x, VDD functions alternately as the A/D converter reference voltage input. When using the A/D
converter, stabilize VDD at the supply voltage used (2.7 to 5.5 V).
2.2.7 VSS
This is the ground pin.
In
μPD78F921x, VSS functions alternately as the ground potential of the A/D converter. Be sure to connect VSS to a
stabilized GND (= 0 V).
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