参数资料
型号: UPD78F9221CS-CAC-A
厂商: Renesas Electronics America
文件页数: 88/125页
文件大小: 0K
描述: MCU 8BIT 2KB FLASH 20PIN
标准包装: 400
系列: 78K0S/Kx1+
核心处理器: 78K0S
芯体尺寸: 8-位
速度: 10MHz
连通性: LIN,UART/USART
外围设备: LVD,POR,PWM,WDT
输入/输出数: 15
程序存储器容量: 2KB(2K x 8)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 20-DIP(0.300",7.62mm)
包装: 托盘
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16898EJ6V0UD
63
4.2.4
Port 12
Port 12 is a 3-bit I/O port with an output latch. Each bit of this port can be set to the input or output mode by using
port mode register 12 (PM12).
When the P123 pin is used as an input port, an on-chip pull-up resistor can be
connected by using pull-up resistor option register 12 (PU12).
The P121 and P122 pins are also used as the X1 and X2 pins of the system clock oscillator. The functions of the
P121 and P122 pins differ, therefore, depending on the selected system clock oscillator. The following three system
clock oscillators can be used.
(1) High-speed internal oscillator
The P121 and P122 pins can be used as I/O port pins.
(2) Crystal/ceramic oscillator
The P121 and P122 pins cannot be used as I/O port pins because they are used as the X1 and X2 pins.
(3) External clock input
The P121 pin is used as the X1 pin to input an external clock, and therefore it cannot be used as an I/O port pin.
The P122 pin can be used as an I/O port pin.
The system clock oscillation is selected by the option byte. For details, refer to CHAPTER 17 OPTION BYTE.
Reset signal generation sets port 12 to the input mode.
Figures 4-10 and 4-11 show the block diagrams of port 12.
Figure 4-10. Block Diagram of P121 and P122
P121/X1,
P122/X2
RD
WRPORT
WRPM
Output latch
(P121, P122)
PM121, PM122
PM12
Internal
bus
Selector
P12
P12:
Port register 12
PM12:
Port mode register 12
RD:
Read signal
WR
××: Write signal
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