参数资料
型号: USB1T20MTCX
厂商: Fairchild Semiconductor
文件页数: 2/9页
文件大小: 0K
描述: TRANSCEIVER USB 14-TSSOP
标准包装: 1
类型: 收发器
驱动器/接收器数: 1/1
规程: USB 2.0
电源电压: 3.3V
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 标准包装
其它名称: USB1T20MTCXDKR
2004 Fairchild Semiconductor Corporation
www.fairchildsemi.com
USB1T20
Rev. 1.0.3
2
US
B1
T20
Universa
l
Se
rial
Bus
Trans
ceiver
Pin Configuration
MODE
/OE
RCV
VP
VM
SUSPND
GND
VCC
VMO/FSEO
VPO
D+
D-
SPEED
NC
14
13
12
11
10
9
8
1
2
3
4
5
6
7
Figure 2. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
I/O
Description
1
MODE
I
Mode. When left unconnected, a weak pull-up transistor pulls mode pin to VCC and, in
this GND, the VMO/FSEO pin takes the function of FSEO (force SEO).
2
/OE
I
Output Enable. Active LOW; enables the transceiver to transmit data on the bus.
When not active, the transceiver is in receive mode.
3
RCV
O
Receive Data. CMOS-Level output for USB differential input.
4, 5
VP,VM
O
Gated version of D-
and D+. Outputs are logic “0” and logic “1.” Used to detect single
ended zero (/SEO), error conditions, and interconnected speed. (Input to SIE).
VP
VM
RESULT
0
/SEO
0
1
Low Speed
1
0
Full Speed
0
1
Error
6
SUSPND
I
Suspend. Enables a low-power state while the USB bus is inactive. While the suspend
pin is active, it drives the RCV pin to a logic “0” state. Both D+ and D- are
3-state.
7
GND
Ground reference.
8
NC
No connect.
9
SPEED
I
Edge Rate Control. Logic
“1” operates at edge rates for full speed. Logic “0” operates
edge rates for low speed.
10, 11
D-, D+
AI/O
Data+, Data-. Differential data bus conforming to the Universal Serial Bus standard.
12, 13
VPO,VMO/FSEO
I
Inputs to differential driver. (Outputs from SIE.)
Mode
VPO
VMO/FSEO
RESULT
0
Logic “0”
0
1
/SEO
1
0
Logic “1”
1
/SEO
1
0
/SEO
0
1
Logic “0”
1
0
Logic “1”
1
Illegal Code
14
VCC
3.0 to 3.6 power supply.
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