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参数资料
| 型号： | V2-EVAL-EXT64 |
| 厂商： | FTDI, Future Technology Devices International Ltd |
| 文件页数： | 36/64页 |
| 文件大小： | 0K |
| 描述： | MOD V2-EVAL DAUGHTER CARD 64-PIN |
| 标准包装： | 5 |
| 系列： | Vinculum-II |
| 附件类型： | 子板 |
| 适用于相关产品： | V2-EVAL，VCN2 |
| 产品目录页面： | 634 (CN2011-ZH PDF) |
| 其它名称： | 768-1059 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页当前第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
Document Reference No.: FT_000247
V2-EVAL Vinculum II Evaluation Board Datasheet Version 2.0
Clearance No.: FTDI#148
5.18
VNC2 Daughterboard Connector – J2
1
2
Figure 5.23
VNC2 Daughterboard Connector J2
Schematic
Signal Name (44)
Connector
Pin
VCN2 Pin No
32-PIN 48-PIN 64-PIN
IO
type
Description
V_DSR#
V_DCD#
V_RI#
V_TXDEN
1
2
3
4
-
-
-
-
36
37
38
41
44
45
46
47
IO
IO
IO
IO
Connected to
P1 pin 30 / CN10
Connected to
P1 pin 31 / CN10
Connected to
P1 pin 32 / CN10
Connected to
P1 pin 33 / CN10
pin 6 / CN6 pin 2.
pin 7 / CN6 pin 3.
pin 8 / CN6 pin 4.
pin 9 / CN6 pin 5.
3.3V
3.3V
GPIO7
GPIO8
GPIO9
SPI_S1_CLK
SPI_S1_MOSI
SPI_S1_MISO
GND
SPI_S1_CS#
DEBUG_IF
GND
5
6
7
8
9
10
11
12
13
14
15
16
-
-
-
-
-
-
-
-
-
-
11
-
-
-
42
43
44
-
-
-
-
-
11
-
-
-
48
49
50
57
58
59
-
60
11
-
-
-
IO
IO
IO
IO
IO
IO
-
IO
IO
-
3.3V power rail.
3.3V power rail.
Connected to P1 pin 34 / CN6 pin 6.
Connected to P1 pin 36 / CN6 pin 7.
Connected to P1 pin 37 / CN6 pin 8.
Connected to P1 pin 42 / CN7 pin 5.
Connected to P1 pin 43 / CN7 pin 6.
Connected to P1 pin 44 / CN7 pin 7.
Ground pin.
Connected to P1 pin 45 / CN7 pin 8.
Debug pin. Connected to P1 pin 4 / CN3 pin 1.
Ground pin.
Notes:
(44) The signal names relate to the labels used on pages 1 & 2 of the V2-EVAL base board schematic. Unless
otherwise stated, the function of the IO signals is set by the user application running on the VNC2.
Table 5.19
Connector J2 Pinout
Copyright ? 2010 Future Technology Devices International Limited
35
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