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| 型号： | V2DIP2-32 |
| 厂商： | FTDI, Future Technology Devices International Ltd |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | MOD VINCULUM-II DEV 2 PORT 32DIP |
| 标准包装： | 5 |
| 系列： | Vinculum-II |
| 主要目的： | 接口，USB 2.0 主机/控制器 |
| 嵌入式： | 是，ASIC |
| 已用 IC / 零件： | VNC2-32Q |
| 主要属性： | 双路 A 型连接器，UART / 并行 FIFO / SPI 接口 |
| 次要属性： | LED 状态指示器 |
| 已供物品： | 板 |
| 产品目录页面： | 634 (CN2011-ZH PDF) |
| 相关产品： | 768-1052-ND - MOD VINCULUM-II DEBUGGR/PROGRAMR |
| 其它名称： | 768-1055 |
Document Reference No.: FT_000164
V2DIP2-32 VNCL2-32Q Development Module Datasheet Version 1.01
Clearance No.: FTDI# 151
`
3.6 Parallel FIFO Interface - Asynchronous Mode
The Parallel FIFO Asynchronous mode is functionally the same as the Parallel FIFO Interface present in
VDIP1 has an eight bit data bus, individual read and write strobes and two hardware flow control signals.
3.6.1 Signal Description - Parallel FIFO Interface
shows the Parallel FIFO Interface signals and the pins that they can be mapped.
Available Pins
J2-10, J1-6, J1-11
J2-9, J1-8, J1-12
J2-8, J1-9, J2-12
J2-6, J1-10, J2-11
J2-10, J1-6, J1-11
J2-9, J1-8, J1-12
J2-8, J1-9, J2-12
J2-6, J1-10, J2-11
J2-10, J1-6, J1-11
J2-9, J1-8, J1-12
J2-8, J1-9, J2-12
J2-6, J1-10, J2-11
Name
fifo_data[0]
fifo_data[1]
fifo_data[2]
fifo_data[3]
fifo_data[4]
fifo_data[5]
fifo_data[6]
fifo_data[7]
fifo_rxf#
fifo_txe#
fifo_rd#
fifo_wr#
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Output
Output
Input
Input
Description
FIFO data bus Bit 0
FIFO data bus Bit 1
FIFO data bus Bit 2
FIFO data bus Bit 3
FIFO data bus Bit 4
FIFO data bus Bit 5
FIFO data bus Bit 6
FIFO data bus Bit 7
When high, do not read data from
the FIFO. When low, there is data
available in the FIFO which can be
read by strobing RD# low, then high.
When high, do not write data into the
FIFO. When low, data can be written
into the FIFO by strobing WR high,
then low.
Enables the current FIFO data byte
on D0...D7 when low. Fetches the
next FIFO data byte (if available)
from the receive FIFO buffer when
RD# goes from high to low
Writes the data byte on the D0...D7
pins into the transmit FIFO buffer
when WR goes from high to low.
Table 3.6 - Data and Control Bus Signal Mode Options – Parallel FIFO Interface
Copyright ? 2010 Future Technology Devices International Limited
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| V2DIP2-48 | 功能描述:界面开发工具 USB Vinculum-II 48 Pin Mod 2 USB Ports RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
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| V2-EVAL | 功能描述:MOD VINCULUM-II EVAL KIT RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:Vinculum-II 标准包装:1 系列:- 主要目的:数字电位器 嵌入式:- 已用 IC / 零件:AD5258 主要属性:- 次要属性:- 已供物品:板 相关产品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| V2-EVAL (EU) | 功能描述:界面开发工具 USB Vinculum-II Eval Kit EU Power Supply RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
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