参数资料
型号: VCA821IDRG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO14
封装: GREEN, PLASTIC, MS-012AB, SOIC-14
文件页数: 13/36页
文件大小: 1276K
代理商: VCA821IDRG4
DIFFERENCE AMPLIFIER
G=2
R
F
R
G
1+sR C
G
1
1+sR C
1
(1)
R
F
+V
IN
R
G+
R
G-
-VIN
FB
R
S
20W
V
IN1
VCA821
R
G
R
1
C
1
R
S
V
IN2
R
F
+V
IN
R
G+
R
G-
-VIN
FB
R
G
R
S
R
S
20W
V
IN+
V
IN-
VCA821
85
80
75
70
65
60
55
50
45
40
Frequency(Hz)
Common-ModeRejectionRatio(dB)
10k
100k
1M
10M
100M
InputReferred
DIFFERENTIAL EQUALIZER
9
6
3
0
-3
-6
-9
-12
-15
-18
-21
-24
Frequency(Hz)
Gain(dB)
1M
10M
1G
100M
InitialFrequencyResponse
oftheVCA821withRCLoad
EqualizedFrequencyResponse
SBOS407B – DECEMBER 2007 – REVISED DECEMBER 2008 ....................................................................................................................................... www.ti.com
be used advantageously because its architecture
allows the application to isolate the input from the
Because
both
inputs
of
the
VCA821
are
gain
setting
elements.
shows
an
high-impedance,
a
difference
amplifier
can
be
implementation of such a configuration. The transfer
implemented without any major problem. Figure 75
function is shown in Equation 1.
shows this implementation. This circuit provides
excellent common-mode rejection ratio (CMRR) as
long as the input is within the CMRR range of –2.1V
to +1.6V. Note that this circuit does not make use of
the gain control pin, VG. Also, it is recommended to
choose RS such that the pole formed by RS and the
parasitic
input
capacitance
does
not
limit
the
bandwidth of the circuit. Figure 76 shows the
common-mode
rejection
ratio
for
this
circuit
implemented in a gain of 20dB for VG = +2V. Note
that because the gain control voltage is fixed and is
normally set to +2V, the feedback element can be
reduced in order to increase the bandwidth. When
reducing the feedback element, make sure that the
VCA821 is not limited by common-mode input
voltage, the current flowing through RG, or any other
limitation described in this data sheet.
Figure 77. Differential Equalizer
This transfer function has one pole, P1 (located at
RGC1), and one zero, Z1 (located at R1C1). When
equalizing an RC load, RL and CL, compensate the
pole added by the load located at RLCL with the zero
Z1. Knowing RL, CL, and RG allows the user to select
C1 as a first step and then calculate R1. Using
RL = 75, CL = 100pF and wanting the VCA821 to
operate at a gain of +2V/V, which gives RF = RG =
Figure 75. Difference Amplifier
453
, allows the user to select C1 = 15.5pF to ensure
a positive value for the resistor R1. With all these
values known, to achieve greater than 300MHz
bandwidth, R1 can be calculated to be 20. Figure 78
shows the frequency response for both the initial,
unequalized frequency response and the resulting
equalized frequency response.
Figure 76. Common-Mode Rejection Ratio
If the application requires frequency shaping (the
transition from one gain to another), the VCA821 can
Figure 78. Differential Equalization of an RC Load
20
Copyright 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): VCA821
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