参数资料
型号: VCE1-E1D-FREQ
厂商: VECTRON INTERNATIONAL
元件分类: XO, clock
英文描述: CRYSTAL OSCILLATOR, CLOCK, 1 MHz - 66.667 MHz, CMOS OUTPUT
封装: ROHS COMPLIANT, PLASTIC PACKAGE-4
文件页数: 2/5页
文件大小: 104K
代理商: VCE1-E1D-FREQ
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
Performance Characteristics
Table 1. Electrical Performance, 5V option
Parameter
Symbol
Min
Typical
Maximum
Units
Frequency
fO
1.000
66.667
MHz
Operating Supply Voltage
1
VDD
4.5
5.0
5.5
V
Absolute Maximum Supply Voltage
-0.7
7.0
V
Supply Current, Output Enabled
IDD
40
mA
Output Logic Levels
Output Logic High
2
Output Logic Low
2
VOH
VOL
0.9*VDD
0.1*VDD
V
Output Rise/Fall Time
2
tR/tF
8
ns
Duty Cycle
3 (ordering option)
SYM
40/60 or 45/55
%
Operating Temperature (ordering option)
TOP
0/70 or -40/85
°C
Storage Temperature
TSTOR
-55
125
°C
Stability
4 (ordering option)
F/T
±50, ±100
ppm
Output Enable/Disable
5
Output Enabled
Output Disabled
E/D
4.0
0.8
V
Start-up time
TSU
10
ms
Table 2. Electrical Performance, 3.3V option
Parameter
Symbol
Min
Typical
Maximum
Units
Frequency
fO
1.000
66.667
MHz
Operating Supply Voltage
1
VDD
2.97
3.3
3.63
V
Absolute Maximum Operating Voltage
-0.5
5.0
V
Supply Current, Output Enabled
IDD
40
mA
Output Logic Levels
Output Logic High
2
Output Logic Low
2
VOH
VOL
0.9*VDD
0.1*VDD
V
Output Rise/Fall Time
2
tR/tF
8
ns
Duty Cycle
3 (ordering option)
SYM
40/60 or 45/55
%
Operating Temperature (ordering option)
TOP
0/70 or –40/85
°C
Storage Temperature
TSTOR
-55
125
°C
Stability
4 (ordering option)
F/T
±50, ±100
ppm
Output Enable/Disable
5
Output Enabled
Output Disabled
E/D
2.0
0.5
V
Start-up time
TSU
10
ms
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 3 defines these parameters. Figure 4 illustrates the operating conditions under which these parameters are
tested and specified. For Fo>90MHz, rise and fall time is measured 20 to 80%.
3. Symmetry is measured defined as On Time/Period.
4. Includes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration.
5. Output will be enabled if enable/disable is left open.
Figure 3. Output Waveform
Figure 4. Typical Output Test Conditions (25
±5°C)
+
-
+
-
IC
VC
3
2
.1F
.01
F
15pF
4
1
IDD
VDD
V
OH
50%
V
OL
tF
tR
Period
On Time
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