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参数资料
| 型号： | VG-1011JAFREQ-AVK0-OUT23 |
| 元件分类： | XO, clock |
| 英文描述： | VCXO, CLOCK, 1.5 MHz - 28.63636 MHz, CMOS/TTL OUTPUT |
| 文件页数： | 1/2页 |
| 文件大小： | 0K |
| 代理商： | VG-1011JAFREQ-AVK0-OUT23 |
48
Crystal oscillator
Recommended soldering pattern
Stability / Temperature range
Pull range
(Unit: mm)
Please consult us for AVN type device.
1.3
3.0
5.8
3.0
1.3
3.8
1
VC
2
GND
3
OUT
4
VDD
NO.
External dimensions
Specifications (characteristics)
(Unit: mm)
9.8
Max.
8.65
14.0 Max.
4.06
4.7
Max.
0.25
Min
.
0.51
5.08
0.25
7.62
# 4
# 3
# 1
# 2
VG1011 BXK
27.0000M
9357A
E
± 15 x 10-6
± 20 x 10-6
± 25 x 10-6
S
A
B
V
No.
–
G, K, N
–
W
B
–
X
–
G, K, N
-20
°C to +70 °C -30 °C to +75 °C -40 °C to +85 °C
B
G
K
N
± 20 x 10-6 Min.
± 50 x 10-6 Min.
± 75 x 10-6 Min.
± 100 x 10-6 Min.
Pull range
Temperature range
Stability
Pin terminal
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR
VG-1011JA series
High accuracy and high reliability due to trimmerless design.
Built-in heat resistive AT-cut crystal provides heat resistance
equivalent to that of general-purpose ICs.
Use of C-MOS IC assures low current consumption.
Excellent shock resistance and environmental capability.
Supply voltage: 5 V
Item
Output frequency range
Power source
voltage
Temperature
range
Soldering condition
Frequency stability
Current consumption
Pull range
Input resistance
Frequency change polarity
Duty
Output voltage
Output load condition (fan out)
Output rise time
Output fall time
Oscillation start up time
Aging
Shock resistance
Symbol
f0
VDD-GND
VDD
TSTG
TOPR
TSOL
f/f0
lop
fC
ZIN
tW/t
VOH
VOL
N/CL
tTLH
tTHL
tOSC
fa
S.R.
Specifications
1.5000 MHz to 28.63636 MHz
-0.5 V to +7.0 V
5.0 V ±0.5 V
-55 °C to +125 °C
As per below table
Twice at under +260 °C within 10 s
As per below table
10 mA Max.
As per below table
10 M
Min.
Positive polarity
40 % to 60 %
VDD -0.4 V Min.
0.4 V Max.
2 TTL or 15 pF Max.
8 ns Max.
5 ns Max.
8 ns Max.
5 ns Max.
4 ms Max.
±5 x 10-6 Max.
Remarks
No load condition
VC=2.5±2.0 V
DC Level
VC=0.5 to 4.5 V
1.4 V or 1/2VDD level
IOH= -0.8 mA
IOL=1.6 mA
TTL load/C-MOS load
C-MOS load: 20 %
→80 % VDD
TTL load: 0.4 V
→2.4 V
C-MOS load: 80 %
→20 % VDD
TTL load: 2.4 V
→0.4 V
Time at 4.5 V to be 0 s
Ta=+25 °C, VDD =5 V, first year
Three drops on a hard board from 750 mm
or excitation test with 29400 m/s2 x 0.3 ms x
1/2sine wave in 3 directions
Max. supply voltage
Operating voltage
Storage temperature
Operating temperature
Actual size
Note:
Please contact us for inquiries about operating temperature, frequency stability, pull range.
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