参数资料
型号: VTM48ET020T080A00
厂商: Vicor Corporation
文件页数: 12/18页
文件大小: 0K
描述: VTM CURRENT MULTIPLIER 2V 80A
应用说明: Factorized Power Architecture and V-I Chips
标准包装: 1
系列: V-I Chip™, VTM™
类型: 变压模块
输出数: 1
电压 - 输入(最小): 26V
电压 - 输入(最大): 55V
输出电压: 2V
电流 - 输出(最大): 80A
电源(瓦) - 制造商系列: 160W
电压 - 隔离: 2.25kV(2250V)
应用: 商用
特点: 具有远程开/关功能
安装类型: 通孔
封装/外壳: 模块
尺寸/尺寸: 1.28" L x 0.87" W x 0.26" H(32.5mm x 22.0mm x 6.7mm)
包装: 托盘
工作温度: -40°C ~ 125°C
效率: 92.4%
电源(瓦特)- 最大: 160W
重量: 0.033 磅(14.97g)
其它名称: 1102-1170
VTM48ET020T080A00-ND
VTM 48 E x 020 y 080 A00
Assuming that R = 1 Ω , the effective R as seen from the secondary
This is similar in form to Eq. (3), where R OUT is used to
represent the characteristic impedance of the SAC?. However,
in this case a real R on the input side of the SAC is effectively
scaled by K 2 with respect to the output.
A         0.98 mΩ, with K = be    as shown in      the 15.
side similar exercise should 1/32 performed with Figure additon of a
capacitor or shunt impedance at the input to the SAC. A
switch in series with V IN is added to the circuit. This is depicted
in Figure 16.
Low impedance is a key requirement for powering a high-
current, low voltage load efficiently. A switching regulation
stage should have minimal impedance while simultaneously
providing appropriate filtering for any switched current. The
use of a SAC between the regulation stage and the point of
load provides a dual benefit of scaling down series impedance
leading back to the source and scaling up shunt capacitance or
energy storage as a function of its K factor squared. However,
the benefits are not useful if the series impedance of the SAC
is too high. The impedance of the SAC must be low, i.e. well
beyond the crossover frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
SAC ?
K = 1/32
IN
Vin
+
S
C
SAC
K = 1/32
OUT
V Vout
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
The two main terms of power loss in the VTM ? module are:
- No load power dissipation (P NL ): defined as the power
used to power up the module with an enabled powertrain
at no load.
Figure 16 — Sine Amplitude Converter? with input capacitor
- Resistive loss (R OUT ): refers to the power loss across
the VTM modeled as pure resistive impedance.
A change in V IN with the switch closed would result in a
change in capacitor current according to the following
equation:
P DISSIPATED = P NL + P ROUT
Therefore,
(10)
I C (t) = C
dV IN
dt
(7)
P OUT = P IN – P DISSIPATED = P IN – P NL – P ROUT
(11)
Assume that with the capacitor charged to V IN , the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
The above relations can be combined to calculate the overall
module efficiency:
I C = I OUT ? K
Substituting Eq. (1) and (8) into Eq. (7) reveals:
C ? dV OUT
I OUT =
K 2 dt
(8)
(9)
h =
=
P OUT = P IN – P NL – P ROUT
P IN P IN
V IN ? I IN – P NL – (I OUT ) 2 ? R OUT
V IN ? I IN
(12)
)
The equation in terms of the output has yielded a K 2 scaling
factor for C, specified in the denominator of the equation.
= 1–
(
P NL + (I OUT ) 2 ? R OUT
V IN ? I IN
A K factor less than unity, results in an effectively larger
capacitance on the output when expressed in terms of the
input. With a K=1/32 as shown in Figure 16,
C =1 μF would appear as C=1024 μF when viewed
from the output.
VTM ? Current Multiplier
Page 12 of 18
Rev 3.2
4/2013
vicorpower.com
800 735.6200
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