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参数资料
| 型号： | W255 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 时钟和缓冲器 |
| 文件页数： | 3/10页 |
| 文件大小： | 129K |
| 代理商： | W255 |
W255
Document #: 38-07255 Rev. *C
Page 3 of 10
Serial Configuration Map
The serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
Reserved and unused bits should be programmed to
“
0.
”
SMBus Address for the W255 is:
Byte 6: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Byte 7: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
----
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
–
–
–
1
45,44
43, 42
39, 38
34, 33
Description
Default
0
0
0
1
1
1
1
1
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
FBOUT
DDR11T, DDR11C
DDR10T, DDR10C
DDR9T, DDR9C
DDR8T, DDR8C
Bit
Bit 7
Bit 6
Bit 5
Pin #
30, 29
28, 27
21, 22
Description
Default
DDR7T, DDR7C
DDR6T, DDR6C
DDR5T_SDRAM8,
DDR5C_SDRAM9
DDR4T_SDRAM6,
DDR4C_SDRAM7
DDR3T_SDRAM4,
DDR3C_SDRAM5
DDR2T_SDRAM2,
DDR2C_SDRAM3
DDR1T_SDRAM0,
DDR1C_SDRAM1
DDR0T_SDRAM10,
DDR0C_SDRAM11
1
1
1
Bit 4
19, 20
1
Bit 3
15,16
1
Bit 2
10, 11
1
Bit 1
6, 7
1
Bit 0
4, 5
1
相关PDF资料 |
PDF描述 |
|---|---|
| W255H | 200-MPz 24-Output Buffer for 4DDR or 3 SDRAM DIMMS |
| W255HT | 200-MPz 24-Output Buffer for 4DDR or 3 SDRAM DIMMS |
| W25P010AD-8 | x32 Fast Synchronous SRAM |
| W25P010AF-6 | x32 Fast Synchronous SRAM |
| W25P010AF-7 | x32 Fast Synchronous SRAM |
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|---|---|
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| W255E11 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:CV Motion Control Op./Details DX CODE ZA |
| W255H | 制造商:Cypress Semiconductor 功能描述:Clock Fanout Buffer 24-OUT 48-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:TIMING DEVICE - Bulk |
| W255HT | 制造商:Rochester Electronics LLC 功能描述:TIMING DEVICE - Bulk |
| W256 | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:12 Output Buffer for 2 DDR and 3 SRAM DIMMS |
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