参数资料
型号: W332M72V-125BC
厂商: MICROSEMI CORP-PMG MICROELECTRONICS
元件分类: DRAM
英文描述: 32M X 72 SYNCHRONOUS DRAM, 6 ns, PBGA219
封装: 32 X 25 MM, PLASTIC, BGA-219
文件页数: 13/15页
文件大小: 257K
代理商: W332M72V-125BC
7
White Electronic Designs
W332M72V-XBX
March 2006
Rev. 3
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
TRUTH TABLE - COMMANDS AND DQM OPERATION (NOTE 1)
NAME (FUNCTION)
CS#
RAS#
CAS#
WE#
DQM
ADDR
I/Os
COMMAND INHIBIT (NOP)
H
X
NO OPERATION (NOP)
L
H
X
ACTIVE (Select bank and activate row) ( 3)
L
H
X
Bank/Row
X
READ (Select bank and column, and start READ burst) (4)
L
H
L
H
L/H 8
Bank/Col
X
WRITE (Select bank and column, and start WRITE burst) (4)
L
H
L
L/H 8
Bank/Col
Valid
BURST TERMINATE
L
H
L
X
Active
PRECHARGE (Deactivate row in bank or banks) ( 5)
L
H
L
X
Code
X
AUTO REFRESH or SELF REFRESH (Enter self refresh mode) (6, 7)
L
H
X
LOAD MODE REGISTER (2)
L
X
Op-Code
X
Write Enable/Output Enable (8)
––––
L
Active
Write Inhibit/Output High-Z (8)
––––
H
High-Z
Register Denition section. The LOAD MODE REGISTER
command can only be issued when all banks are idle, and
a subsequent executable command cannot be issued until
tMRD is met.
ACTIVE
The ACTIVE command is used to open (or activate) a
row in a particular bank for a subsequent access. The
value on the BA0, BA1 inputs selects the bank, and the
address provided on inputs A0-12 selects the row. This row
remains active (or open) for accesses until a PRECHARGE
command is issued to that bank. A PRECHARGE
command must be issued before opening a different row
in the same bank.
READ
The READ command is used to initiate a burst read
access to an active row. The value on the BA0, BA1 inputs
selects the bank, and the address provided on inputs A0-9
selects the starting column location. The value on input
A10 determines whether or not AUTO PRECHARGE is
used. If AUTO PRECHARGE is selected, the row being
accessed will be precharged at the end of the READ
burst; if AUTO PRECHARGE is not selected, the row will
remain open for subsequent accesses. Read data appears
COMMANDS
The Truth Table provides a quick reference of available
commands. This is followed by a written description of each
command. Three additional Truth Tables appear following
the Operation section; these tables provide current state/
next state information.
COMMAND INHIBIT
The COMMAND INHIBIT function prevents new commands
from being executed by the SDRAM, regardless of whether
the CLK signal is enabled. The SDRAM is effectively
deselected. Operations already in progress are not
affected.
NO OPERATION (NOP)
The NO OPERATION (NOP) command is used to perform
a NOP to an SDRAM which is selected (CS# is LOW).
This prevents unwanted commands from being registered
during idle or wait states. Operations already in progress
are not affected.
LOAD MODE REGISTER
The Mode Register is loaded via inputs A0-11 (A12
should be driven low). See Mode Register heading in the
NOTES:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. A0-11 dene the op-code written to the Mode Register and A12 should be driven
low.
3. A0-12 provide row address, and BA0, BA1 determine which bank is made active.
4. A0-9 provide column address; A10 HIGH enables the auto precharge feature
(nonpersistent), while A10 LOW disables the auto precharge feature; BA0, BA1
determine which bank is being read from or written to.
5. A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks
precharged and BA0, BA1 are “Don’t Care.”
6. This command is AUTO REFRESH if CKE is HIGH; SELF REFRESH if CKE is
LOW.
7. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care”
except for CKE.
8. Activates or deactivates the I/Os during WRITEs (zero-clock delay) and READs
(two-clock delay).
相关PDF资料
PDF描述
W7NCF04GH11IS4JG 256M X 16 FLASH 3.3V PROM CARD, 150 ns, UUC
W7NCF08GH11IS6DG 512M X 16 FLASH 3.3V PROM CARD, 150 ns, UUC
W7NCF08GH11IS9CG 512M X 16 FLASH 3.3V PROM CARD, 150 ns, UUC
WMF128K8-90FESMD5A 128K X 8 FLASH 5V PROM, 90 ns, CDFP32
WS512K8-35CIEA 512K X 8 MULTI DEVICE SRAM MODULE, 35 ns, CDMA32
相关代理商/技术参数
参数描述
W332M72V-125BI 制造商:White Electronic Designs 功能描述:DRAM Module SDRAM 256Mbyte 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 125MHZ, 219 PBGA, INDUSTRIAL TEMP. - Bulk 制造商:Microsemi Corporation 功能描述:SDRAM MEMORY
W332M72V-125BM 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 125MHZ, 219 PBGA, MIL-TEMP. - Bulk
W332M72V-125SBC 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 125MHZ, 208 PBGA, COMMERCIAL TEMP. - Bulk
W332M72V-125SBI 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 125MHZ, 208 PBGA, INDUSTRIAL TEMP. - Bulk
W332M72V-125SBM 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 125MHZ, 208 PBGA, MIL-TEMP. - Bulk 制造商:Microsemi Corporation 功能描述:SDRAM MEMORY