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参数资料
| 型号： | W3EG6465S262D3 |
| 厂商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分类： | DRAM |
| 英文描述： | 64M X 64 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封装： | DIMM-184 |
| 文件页数： | 7/11页 |
| 文件大小： | 243K |
| 代理商： | W3EG6465S262D3 |
5
November 2005
Rev. 2
W3EG6465S-D3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
PRELIMINARY
IDD SPECIFICATIONS AND TEST CONDITIONS
0°C TA 70°C, VCCQ = 2.5V ± 0.2V, VCC = 2.5V ± 0.2V
Includes DDR SDRAM component only
Parameter
Symbol Conditions
DDR266@CL=2
Max
DDR266@CL=2/2.5
Max
DDR200@CL=2
Max
Units
Operating Current
IDD0
One device bank; Active - Precharge; tRC=tRC
(MIN); tCK=tCK (MIN); DQ,DM and DQS inputs
changing once per clock cycle; Address and control
inputs changing once every two cycles.
1280
mA
Operating Current
IDD1
One device bank; Active-Read-Precharge Burst
= 2; tRC=tRC (MIN); tCK=tCK (MIN); lOUT = 0mA;
Address and control inputs changing once per
clock cycle.
1600
mA
Precharge Power-
Down Standby
Current
IDD2P
All device banks idle; Power-down mode; tCK=tCK
(MIN); CKE=(low)
48
rnA
Idle Standby Current
IDD2F
CS# = High; All device banks idle; tCK=tCK (MIN);
CKE = high; Address and other control inputs
changing once per clock cycle. VIN = VREF for DQ,
DQS and DM.
320
mA
Active Power-Down
Standby Current
IDD3P
One device bank active; Power-Down mode; tCK
(MIN); CKE=(low)
480
mA
Active Standby
Current
IDD3N
CS# = High; CKE = High; One device bank; Active-
Precharge; tRC=tRAS (MAX); tCK=tCK (MIN); DQ, DM
and DQS inputs changing twice per clock cycle;
Address and other control inputs changing once
per clock cycle.
720
mA
Operating Current
IDD4R
Burst = 2; Reads; Continuous burst; One device
bank active; Address and control inputs changing
once per clock cycle; TCK= TCK (MIN); lOUT = 0mA.
1920
mA
Operating Current
IDD4W
Burst = 2; Writes; Continuous burst; One device
bank active; Address and control inputs changing
once per clock cycle; tCK=tCK (MIN); DQ,DM and
DQS inputs changing once per clock cycle.
2160
rnA
Auto Refresh Current
IDD5
tRC = tRC (MIN)
2560
mA
Self Refresh Current
IDD6
CKE 0.2V
Standard
48
mA
Low Power
25
Operating Current
IDD7A
Four bank interleaving Reads (BL=4) with auto
precharge with tRC=tRC (MIN); tCK=tCK (MIN);
Address and control inputs change only during
Active Read or Write commands.
3840
mA
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相关代理商/技术参数 |
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|---|---|
| W3EG6465S262D4C | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB- 64Mx64 DDR SDRAM UNBUFFERED |
| W3EG6465S263D3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR SDRAM UNBUFFERED |
| W3EG6465S263D4C | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB- 64Mx64 DDR SDRAM UNBUFFERED |
| W3EG6465S265D3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR SDRAM UNBUFFERED |
| W3EG6465S265D4C | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB- 64Mx64 DDR SDRAM UNBUFFERED |
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