参数资料
型号: W671320P
厂商: WINBOND ELECTRONICS CORP
元件分类: 模拟传输电路
英文描述: TELECOM-SLIC, PQCC28
封装: PLASTIC, LCC-28
文件页数: 20/48页
文件大小: 1344K
代理商: W671320P
W671300 SERIES
7.2.3.1. Silent Polarity Reversal
Changing from Forward Active to Reverse Active or vice versa is referred to as polarity reversal. Many
applications require slew rate control of the polarity reversal event. Requirements range from
minimizing crosstalk to protocol signalling.
The device uses an external low voltage capacitor, CPOL, to set the reversal time. Once programmed,
the reversal time will remain nearly constant over various load conditions. In addition, the reversal
timing capacitor is isolated from the AC loop, so loop stability is not impacted.
The internal circuitry used to set the polarity reversal time is shown below.
C
PO
POL
I
1
75k
I
2
FIGURE 11: REVERSAL TIMING CONTROL
During Forward Active, the current from source I1 charges the external timing capacitor CPOL and the
switch is open. The internal resistor provides a clamping function for voltages on the POL node.
During Reverse Active, the switch closes and I2 (roughly twice I1) pulls current from I1 and the timing
capacitor. The current at the POL node provides the drive to a differential pair which controls the
reversal time (time) according to the following relationship.
CPOL
time
75000
----------------
=
(EQ. 54)
Polarized capacitors may be used for CPOL as the low voltage at the POL pin and minimal voltage
excursion of ±0.75V, are well suited to such capacitors.
7.2.3.2. Power Dissipation
The power dissipation equations for Forward Active operation described above also apply to Reverse
Active operation.
7.2.4. RINGING MODE
The Ringing mode (RNG, 100) provides linear amplification to support a variety of ringing waveforms.
A programmable Ring Trip function provides loop supervision and auto disconnect upon Ring Trip.
The device is designed to operate from the high battery during this mode.
7.2.4.1. Architecture
The device provides linear amplification to the signal applied to the Ringing Signal Input, VRS. The
Publication Release Date: March 2004
- 27 -
Revision 0.5
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