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参数资料
| 型号： | W82M32V-15BC |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | SRAM |
| 英文描述： | 2M X 32 MULTI DEVICE SRAM MODULE, 15 ns, PBGA255 |
| 封装： | 25 X 25 MM, PLASTIC, BGA-255 |
| 文件页数： | 3/7页 |
| 文件大小： | 219K |
| 代理商： | W82M32V-15BC |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W82M32V-XBX
April, 2006
Rev. 5
White Electronic Designs Corp. reserves the right to change products or specications without notice.
AC TEST CIRCUIT
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 W.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes
jig capacitance.
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 2.5
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
AC CHARACTERISTICS
(VCC = 3.3V, -55°C ≤ TA ≤ +125°C)
Parameter
Read Cycle
Symbol
-12
-15
-17
-20
Units
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
12
15
17
20
ns
Address Access Time
tAA
12
15
17
20
ns
Output Hold from Address Change
tOH
33
3
ns
Chip Select Access Time
tACS
12
15
17
20
ns
Output Enable to Output Valid
tOE
78
8
10
ns
Chip Select to Output in Low Z
tCLZ1
33
3
ns
Output Enable to Output in Low Z
tOLZ1
11
1
ns
Chip Disable to Output in High Z
tCHZ1
7
8
10
ns
Output Disable to Output in High Z
tOHZ1
7
8
10
ns.
AC CHARACTERISTICS
(VCC = 3.3V, -55°C ≤ TA ≤ +125°C)
Parameter
Write Cycle
Symbol
-12
-15
-17
-20
Units
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
tWC
12
15
17
20
ns
Chip Select to End of Write
tCW
10
12
14
ns
Address Valid to End of Write
tAW
10
12
14
ns
Data Valid to End of Write
tDW
89
9
10
ns
Write Pulse Width
tWP
10
12
14
ns
Address Setup Time
tAS
00
0
ns
Address Hold Time
tAH
00
0
ns
Output Active from End of Write
tOW1
22
3
ns
Write Enable to Output in High Z
tWHZ1
78
8
9
ns
Data Hold Time
tDH
0
ns
Current Source
IOL
VZ 1.5V
D.U.T.
CEFF = 50pf
Current Source
IOH
(Bipolar Supply)
1. This parameter is guaranteed by design but not tested
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