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参数资料
| 型号： | W964L6ABN70I |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | SRAM |
| 英文描述： | 1M X 16 PSEUDO STATIC RAM, 65 ns, PBGA48 |
| 封装： | 8 X 10 MM, 0.75 MM PITCH, TFBGA-48 |
| 文件页数： | 2/30页 |
| 文件大小： | 1027K |
| 代理商： | W964L6ABN70I |
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W964L6ABN
Read Operation, Continued
Notes:
*1: The output load is 50 pF at VDD (27) and 30 pF at VDD (23).
*2: The output load is 5 pF.
*3: The tCE is applicable if OE is brought to Low before CE1 goes Low and is also applicable if actual value of both or
either tASO or tCLOL is shorter than specified value.
*4: Applicable if OE is brought to Low before CE1 goes Low.
*5: The tASO, tCLOL(min.) and tOP(min) are reference values when the access time is determined by tOE. If actual value of
each parameter is shorter than specified minimum value, tOE become longer by the amount of subtracting actual
value from specified minimum value.
For example, if actual tASO, tASO(actual), is shorter than specified minimum value, tASO(min.), during OE control
access (ie., CE1 stays Low), the tOE become tOE(max.) + tASO(min.) - tASO(actual).
*6: The tASO[ABS] and tOP[ABS] is the absolute minimum value during OE control access.
*7: If actual value of either tCLOL or tOP is shorter than specified minimum value, both tOLAH and tOLCH become tRC(min) -
tCLOL(actual) or tRC(min) - tOP(actual).
*8: Maximum value is applicable if CE1 is kept at low.
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相关代理商/技术参数 |
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| W96A8YVP/GDTG0L | 制造商:Kingbright Corporation 功能描述:CBI |
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