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| 型号： | W986416BH-7 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封装： | 0.400 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件页数： | 1/42页 |
| 文件大小： | 2061K |
| 代理商： | W986416BH-7 |
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W986416BH
1M x 16 bit x 4 Banks SDRAM
Revision 1.4
Publication Release Date: July, 1999
- 1 -
Features
3.3V±0.3V power supply
Up to 143Mhz clock frequency
1,048,576 words x 4 banks x 16 bits organization
Auto Refresh and Self Refresh
CAS latency: 2 and 3
Burst Length: 1, 2, 4, 8 , and full page
Sequential and Interleave burst
Burst read, Single Writes Mode
Byte data controlled by UDQM and LDQM
Power-Down Mode
Auto-Precharge and controlled precharge
4k refresh cycles / 64ms
Interface: LVTTL
Package: TSOP II 54 pin, 400 mil - 0.80
General Description
W986416BH is a high speed synchronous dynamic random access memory (SDRAM) , organized as 1M words x 4 banks x
16 bits. Using pipelined architecture and 0.25um process technology, W986416BH delivers a data bandwidth of up to 286M
bytes per second (-7). For different application, W986416BH is sorted into four speed grades: -7, -75, -8H, and -8N. The –7
parts can run up to 143Mhz/CL3, the -75 parts are compliant to the PC133/CL3 specification, the -8H parts are compliant to the
PC100/CL2 specification, and the -8N is compliant to PC100/CL3 specification.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of
1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated
by the SDRAM internal counrter in burst operation. Random column read is also possible by providing its address at each clock
cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst
to maximize its performance. W986416BH is ideal for main memory in high performance applications.
Key Parameters
Symbol
Description
min/max
-7
-75 (PC133) -8H(PC100) -8N(PC100)
tCK
Clock Cycle Time
Min
7ns
7.5ns
8ns
10ns
tAC
Access Time from CLK
Max
5.4ns
6ns
tRP
Precharge to Active Command
Min
20ns
tRCD
Active to Read/Write Command
Min
20ns
ICC1
Operation Current ( Single bank )
Max
90mA
ICC4
Burst Operation Current
Max
140mA
ICC6
Self-Refresh Current
Max
1mA
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W986416CH | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M x 16 BIT x 4 BANKS SDRAM |
| W986416CH-6 | 制造商:WINBOND 制造商全称:Winbond 功能描述:x16 SDRAM |
| W986416CH-7 | 制造商:Winbond Electronics Corp 功能描述:SDRAM, 4M x 16, 54 Pin, Plastic, TSOP |
| W986416CH-75 | 制造商:WINBOND 制造商全称:Winbond 功能描述:x16 SDRAM |
| W986416CH-8H | 制造商:WINBOND 制造商全称:Winbond 功能描述:x16 SDRAM |
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