参数资料
型号: WB1215X
英文描述: Serial-Input Frequency Synthesizer
中文描述: 串行输入频率合成器
文件页数: 3/9页
文件大小: 174K
代理商: WB1215X
WB1215
3
Pin Definitions
Pin Name
Pin
No.
Pin
Type
Pin Description
OSC_IN
1
I
Oscillator Input: This input has a VCC/2 threshold and CMOS logic level sensitivity.
NC
2
No Connect
OSC_OUT
3
O
Oscillator Output
VP
4P
Charge Pump Rail Voltage: This supply for charge pump. Must be > VCC.
VCC
5P
Power Supply Connection for PLL: When power is removed from VCC all latched
data is lost.
DO
6O
Charge Pump Output: The phase detector gain is IP/2π. Sense polarity can be re-
versed by setting FC LOW (pin 15).
GND
7
G
Analog and Digital Ground Connection: This pin must be grounded.
LD
8
O
Lock Detect Pin: This output is HIGH with narrow LOW pulses when the loop is locked.
NC
9
No Connect
FIN
10
I
Input to Prescaler: Maximum frequency 1.2 GHz.
CLOCK
11
I
Data Clock Input: One bit of data is loaded into the Shift Register on the rising edge
of this signal.
NC
12
No Connect
DATA
13
I
Serial Data Input
LE
14
I
Load Enable: On the rising edge of this signal, the data stored in the Shift Register is
latched into the counters and configuration controls.
FC
15
I
Phase Sense Control for Phase Detector with Internal Pull-up: When pulled LOW,
the polarity of the Phase Detector is reversed.
BISW
16
O
Analog Switch Output: Connects to output of charge pump when LE is HIGH.
FOUT
17
O
Monitor Point for Phase Detector Input
P
18
O
External Charge Pump Output: Open drain N-Channel FET, pull-up resistor required.
PWDN
19
I
Power Down Pin with Internal Pull-up: When pin is HIGH, device is in normal state.
When pin is LOW, device is in power-down mode. When device enters power-down
mode the charge pump is in the three-state condition.
R
20
O
External Change Pump: (CMOS logic output).
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