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参数资料
| 型号： | WB1330X |
| 英文描述： | Serial-Input Frequency Synthesizer |
| 中文描述： | 串行输入频率合成器 |
| 文件页数： | 8/10页 |
| 文件大小： | 160K |
| 代理商： | WB1330X |
WB1330
7
Serial Data Input
Data is input serially using the DATA, CLOCK, and LE pins. Two control bits direct data into the locations given in Table 1.
Notes:
4.
t1–t5 = 50 s > t > 0.5 s.
5.
CLOCK may remain HIGH after latching in data.
6.
DATA is shifted in with the MSB first.
7.
For DATA definitions, refer to Table 2.
Serial Data Input Timing Waveform[4, 5, 6, 7]
Timing Waveforms (continued)
CLOCK
//
LE
//
t2
t1
t3
t4
t5
DATA
PD = MSB
PRE
B1
A7
CNT2
CNT1 = LSB
Table 1. Control Configuration
CNT1
CNT2
Function
00
Program Reference 2: R = 3 to 32767, set PLL2 (low frequency) phase detector
polarity, set current in PLL2, set PLL2 High Impedance State, set monitor selector to PLL2.
01
Program Reference 1: R = 3 to 32767, set PLL1 (high frequency) phase detector
polarity, set current in PLL1, set PLL1 High Impedance State, set monitor selector to PLL1
10
Program Counter for PLL2: A = 0 to 15, B = 3 to 2047, set PLL2 prescaler ratio, set power-
down to PLL2.
11
Program Counter for PLL1: A = 0 to 63, B = 3 to 2047, set PLL1 prescaler ratio, set power-
down to PLL1.
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