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参数资料
| 型号： | WED2EG472512V6D2 |
| 元件分类： | SRAM |
| 英文描述： | 2M X 72 MULTI DEVICE SRAM MODULE, 3.5 ns, DMA168 |
| 封装： | DIMM-168 |
| 文件页数： | 1/9页 |
| 文件大小： | 352K |
| 代理商： | WED2EG472512V6D2 |
1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
WED2EG472512V-D2
January 2000 Rev 0
ADVANCED*
DESCRIPTION
16MB (4x512Kx72) SYNC BURST-
PIPELINE, DUAL KEY DIMM
* This data sheet describes a product that may or may not be under development
and is subject to change or cancellation without notice.
FIG. 1
PIN IDENTIFIER
PIN CONFIGURATION
VSS
A0
A16
A2
A14
VCC
A4
A12
A6
A10
VSS
A8
RFU
E4
E2
VSS
MODE
EM
GW
RFU
VCC
BW4
BW3
BW8
BW7
ADSC
ADSP
VSS
NC
VCC
DQ0
DQ1
DQ2
DQ3
VSS
ZZ1
VCC
DQ8
DQ9
DQ10
DQ11
VSS
A17
A1
A15
A3
VCC
A13
A5
A11
A7
VSS
A9
A18
E1
E3
VSS
CLK
VSS
G
BWE
VCC
BW2
BW1
BW6
BW5
VSS
ADV
VSS
DQP0
VCC
DQ7
DQ6
DQ5
DQ4
VSS
DQP1
VCC
DQ15
DQ14
DQ13
DQ12
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
NC
VCC
DQ16
DQ17
DQ18
DQ19
VSS
ZZ2
VCC
DQ24
DQ25
DQ26
DQ27
VSS
NC
VCC
DQ32
DQ33
DQ34
DQ35
VSS
ZZ3
VCC
DQ40
DQ41
DQ42
DQ43
VSS
NC
VCC
DQ48
DQ49
DQ50
DQ51
VSS
ZZ4
VCC
DQ56
DQ57
DQ58
DQ59
VSS
DQP2
VCC
DQ23
DQ22
DQ21
DQ20
VSS
DQP3
VCC
DQ31
DQ30
DQ29
DQ28
VSS
DQP4
VCC
DQ39
DQ38
DQ37
DQ36
VSS
DQP5
VCC
DQ47
DQ46
DQ45
DQ44
VSS
DQP6
VCC
DQ55
DQ54
DQ53
DQ52
VSS
DQP7
VCC
DQ63
DQ62
DQ61
DQ60
VSS
FEATURES
s 4x512Kx72 Synchronous, Synchronous Burst
s Pipeline Architecture; Dual Cycle Deselect
s Linear and Sequential Burst Support via MODE pin
s Clock Controlled Registered Module Enable (EM)
s Clock Controlled Registered Bank Enables (E1, E2, E3, E4)
s Clock Controlled Byte Write Mode Enable (BWE)
s Clock Controlled Byte Write Enables (BW1 - BW8)
s Clock Controlled Registered Address
s Clock Controlled Registered Global Write (GW)
s Asynchronous Output Enable (G)
s Internally Self-Timed Write
s Individual Bank Sleep Mode Enables (ZZ1, ZZ2, ZZ3, ZZ4)
s Gold Lead Finish
s 3.3V
± 10% Operation
s Frequency(s): 200, 166, 150 and 133MHz
s Access Speed(s): tKHQV = 3.0, 3.5, 3.7 and 4.0ns
s Common Data I/O
s High Capacitance (30pF) Drive, at Rated Access Speed
s Single Total Array Clock
s Multiple Vcc and Gnd for Improved Noise Immunity
The WED2EG472512V is a Synchronous/Synchronous Burst SRAM,
84 position Dual Key; Double High DIMM (168 contacts) Module,
organized as 4x512Kx72. The Module contains sixteeen (16) Syn-
chronous Burst RAM devices, packaged in the industry standard
JEDEC 14mmx20mm TQFP placed on a Multilayer FR4 Substrate.
The Module Architecture is defined as a Sync/SyncBurst, Pipe-
line, with support for either linear or sequential burst. This
Module provides high performance, 3-1-1-1 accesses when used
in Burst Mode.
Synchronous Only operations are performed via strapping ADSC
Low, and ADSP/ADV High, which provides for Ultra Fast Accesses
in Read Mode while providing for internally self-timed Early
Writes.
Synchronous/Synchronous Burst operations are in relation to an
externally supplied clock, Registered Address, Registered Global
Write, Registered Enables as well as an Asynchronous Output
Enable. This Module has been defined with full flexibility, which
allows individual control of each of the eight bytes, as well as
Quad Words in both Read and Write Operations.
PIN DESCRIPTION
DQ0 -DQ63
Input/OutputBus
DQP0 - DQP7
Parity Bits
A0 - A18
Address Bus
EM
Module Enable
E1, E2, E3, E4
Synchronous Bank Enables
BWE
Byte Write Mode Enable
BW1 - BW8
Byte Write Enables
CLK
Array Clock
GW
Synchronous Global Write Enable
G
Asynchronous Output Enable
ZZ1, ZZ2, ZZ3, ZZ4
Bank Sleep Mode Enables
Vcc
3.3V Power Supply
Vss
Ground
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相关代理商/技术参数 |
参数描述 |
|---|---|
| WED2EG472512V7D2 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:16MB (4x512Kx72) SYNC BURST PIPELINE, DUAL KEY DIMM |
| WED2EG472512V-D2 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:16MB (4x512Kx72) SYNC BURST PIPELINE, DUAL KEY DIMM |
| WED2ZL236512S-BC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NBL SSRAM MCP |
| WED2ZL361MS | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:1Mx36 Synchronous Pipeline Burst NBL SRAM |
| WED2ZL361MS26BC | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:1Mx36 Synchronous Pipeline Burst NBL SRAM |
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