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参数资料
| 型号： | WED3EG72M18S265JD3SG |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封装： | ROHS COMPLIANT, DIMM-184 |
| 文件页数： | 8/12页 |
| 文件大小： | 245K |
| 代理商： | WED3EG72M18S265JD3SG |
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WED3EG7218S-JD3
June 2006
Rev. 2
PRELIMINARY
Parameter
Symbol Conditions
DDR400@
CL=3
Max
DDR333@
CL=2.5
Max
DDR266@
CL=2
Max
DDR266@
CL=2.5
Max
DDR200@
CL=2
Max
Units
Operating
Current
ICC0
One device bank; Active =
Precharge; TRC=TRC(MIN);
TCK=TCK(MIN); DQ,DM and DQS
inputs changing once per clock cycle;
Address and control inputs changing
once every two cycles
990
810
mA
Operating
Current
ICC1
One device bank; Active-read-
Precharge; Burst = 2; TRC=TRC(MIN);
TCK=TCK(MIN); lout=0mA; Address
and control inputs changing once per
clock cycle
1260
1035
mA
Precharge
Power-Down
Standby
Current
ICC2P
All device banks idle; Power-down
mode; TCK=TCK(MIN); CKE=(low)
270
255
mA
Idle Standby
Current
ICC2F
CS# = High; All device banks idle;
TCK=TCK(MIN); CKE=high; Address
and other control inputs changing
once per clock cycle. VIN = VREF for
DQ, DQS and DM.
495
405
mA
Active Power-
Down Standby
Current
ICC3P
One device bank active; Power-down
mode; TCK(MIN); CKE=(low)
315
270
mA
Active Standby
Current
ICC3N
CS# = High; CKE = High; One
device bank; Active-Precharge; TRC
= TRAS(MAX); TCK = TCK(MIN); DQ,
DM and DQS inputs changing twice
per clock cycle; Address and other
control inputs changing once per
clock cycle.
540
450
mA
Operating
Current
ICC4R
Burst = 2; Reads; Continous burst;
One device bank active; Address
and control inputs changing once per
clock cycle;
TCK = TCK(MIN); lout = 0mA
1800
1485
mA
Operating
Current
ICC4W
Burst = 2; Writes; Continous burst;
One device bank active; Address
and control inputs changing once per
clock cycle; TCK = TCK(MIN); DQ, DM
and DQS inputs changing twice per
clock cycle.
1935
1530
mA
Auto Refresh
Current
ICC5
TRC = TRC(MIN)
1935
1530
mA
Self Refresh
Current
ICC6
CKE
0.2V
Standard
18
mA
Low Power
9
ICC SPECIFICATIONS AND TEST CONDITIONS
DDR400: VCC = VCCQ = +2.6V ± 0.1V; DDR333, 266, 200: VCC = VCCQ = +2.5V ± 0.2V includes DDR SDRAM component only
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相关代理商/技术参数 |
参数描述 |
|---|---|
| WED3EG72M18S355JD3IMG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:128MB - 16Mx72 DDR SDRAM UNBUFFERED |
| WED3EG72M18S355JD3ISG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:128MB - 16Mx72 DDR SDRAM UNBUFFERED |
| WED3EG72M18S355JD3MG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:128MB - 16Mx72 DDR SDRAM UNBUFFERED |
| WED3EG72M18S355JD3SG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:128MB - 16Mx72 DDR SDRAM UNBUFFERED |
| WED3EG72M18S403JD3IMG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:128MB - 16Mx72 DDR SDRAM UNBUFFERED |
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