参数资料
型号: WMS256K16-17DLC
英文描述: x16 SRAM
中文描述: x16的SRAM
文件页数: 3/7页
文件大小: 111K
代理商: WMS256K16-17DLC
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS256K16-XXX
I
Current Source
D.U.T.
C = 50 pf
I
OL
V
1.5V
(Bipolar Supply)
Z
Current Source
OH
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
Unit
V
ns
V
V
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
°
C to +125
°
C)
Parameter
Symbol
-17
-20
-25
-35
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
RC
17
20
25
35
ns
Address Access Time
t
AA
17
20
25
35
ns
Output Hold from Address Change
t
OH
0
0
0
0
ns
Chip Select Access Time
t
ACS
17
20
25
35
ns
Output Enable to Output Valid
t
OE
10
12
15
20
ns
Chip Select to Output in Low Z
t
CLZ
1
2
5
5
5
ns
Output Enable to Output in Low Z
t
OLZ
1
0
0
0
0
ns
Chip Disable to Output in High Z
t
CHZ
1
9
10
12
15
ns
Output Disable to Output in High Z
t
OHZ
1
9
10
12
15
ns
LB, UB Access Time
t
BA
10
12
14
17
ns
LB, UB Enable to Low Z Output
t
BLZ
1
0
0
0
0
ns
LB, UB Disable to High Z Output
t
BHZ
1
9
10
12
15
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
°
C to +125
°
C)
Parameter
Symbol
-17
-20
-25
-35
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
WC
17
20
25
35
ns
Chip Select to End of Write
t
CW
14
17
20
25
ns
Address Valid to End of Write
t
AW
14
17
20
25
ns
Data Valid to End of Write
t
DW
10
12
15
20
ns
Write Pulse Width
t
WP
14
17
20
25
ns
Address Setup Time
t
AS
0
0
0
0
ns
Address Hold Time
t
AH
2
2
2
2
ns
Output Active from End of Write
t
OW
1
0
0
0
0
ns
Write Enable to Output in High Z
t
WHZ
1
9
10
10
15
ns
Data Hold Time
t
DH
0
0
0
0
ns
LB, UB Valid to End of Write
t
BW
14
17
20
25
ns
1. This parameter is guaranteed by design but not tested.
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