- 您现在的位置：买卖IC网 > PDF目录361907 > WMS512K8LV-100DECE 512Kx8 MONOLITHIC SRAM PDF资料下载
参数资料
| 型号： | WMS512K8LV-100DECE |
| 元件分类： | SRAM |
| 英文描述： | 512Kx8 MONOLITHIC SRAM |
| 中文描述： | 512Kx8整装静态存储器 |
| 文件页数： | 3/6页 |
| 文件大小： | 275K |
| 代理商： | WMS512K8LV-100DECE |
WMS512K8V-XCX
3
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
February, 2000
Rev. 2
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
ADVANCED*
AC CHARACTERISTICS
V
CC
= 3.3V, GND = 0V, -55°C ≤ T
A
≤ +125°C
-70
Min
Max
70
70
5
70
35
10
5
25
25
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
1. This parameter is guaranteed by design but not tested.
Symbol
-85
-100
-120
Units
Min
85
Max
Min
100
Max
Min
120
Max
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
t
OLZ
1
t
CHZ
1
t
OHZ
1
ns
ns
ns
ns
ns
ns
ns
ns
ns
85
100
120
5
5
5
85
40
100
50
120
60
10
5
10
5
10
5
25
25
35
35
35
35
AC CHARACTERISTICS
V
CC
= 3.3V, GND = 0V, -55°C ≤ T
A
≤ +125°C
-70
Min
Max
70
60
60
30
50
0
5
5
t
WHZ
1
25
t
DH
0
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold from Write Time
1. This parameter is guaranteed by design but not tested.
Symbol
-85
-100
-120
Units
Min
85
75
75
35
50
0
5
5
Max
Min
100
80
80
40
60
0
5
5
Max
Min
120
100
100
40
60
0
5
5
Max
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
35
35
0
0
0
Current Source
Current Source
I
OL
I
OH
C
eff
= 50 pf
D.U.T.
V
Z
≈
1.5V
(Bipolar Supply
NOTES:
Vz is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75 .
Vz is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC TEST CIRCUIT
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
AC TEST CONDITIONS
相关PDF资料 |
PDF描述 |
|---|---|
| WMS512K8LV-100DECEA | 512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEIE | 512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEIEA | 512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEME | 512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEMEA | 512Kx8 MONOLITHIC SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| WMS512K8LV-100DECEA | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEIE | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEIEA | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEME | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8LV-100DEMEA | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM |
发布紧急采购，3分钟左右您将得到回复。