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参数资料
| 型号： | WS1M32V-20G3MA |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | SRAM |
| 英文描述： | 1M X 32 MULTI DEVICE SRAM MODULE, 20 ns, CQFP84 |
| 封装： | 28 MM, CERAMIC, QFP-84 |
| 文件页数： | 3/6页 |
| 文件大小： | 309K |
| 代理商： | WS1M32V-20G3MA |
WS1M32V-XG3X
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
White Electronic Designs Corp. reserves the right to change products or specications without notice.
February, 2001
Rev. 5
PRELIMINARY
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
IOH
Current Source
D.U.T.
Ceff = 50 pf
IOL
VZ
1.5V
(Bipolar Supply)
Current Source
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 2.5
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
AC CHARACTERISTICS
VCC = 3.3V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-17
-20
-25
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
17
20
25
ns
Address Access Time
tAA
17
20
25
ns
Output Hold from Address Change
tOH
00
0
ns
Chip Select Access Time
tACS
17
20
25
ns
Output Enable to Output Valid
tOE
10
12
ns
Chip Select to Output in Low Z
tCLZ1
11
1
ns
Output Enable to Output in Low Z
tOLZ1
00
0
ns
Chip Disable to Output in High Z
tCHZ1
12
ns
Output Disable to Output in High Z
tOHZ1
12
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 3.3V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-17
-20
-25
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Write Cycle Time
tWC
17
20
25
ns
Chip Select to End of Write
tCW
15
17
ns
Address Valid to End of Write
tAW
15
17
ns
Data Valid to End of Write
tDW
11
12
13
ns
Write Pulse Width
tWP
15
17
ns
Address Setup Time
tAS
22
2
ns
Address Hold Time
tAH
00
0
ns
Output Active from End of Write
tOW1
23
4
ns
Write Enable to Output in High Z
tWHZ1
911
13
ns
Data Hold Time
tDH
00
0
ns
1. This parameter is guaranteed by design but not tested.
AC TEST CIRCUIT
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