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参数资料
| 型号： | WS512K32-55G2TM |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | SRAM |
| 英文描述： | 512K X 32 MULTI DEVICE SRAM MODULE, 55 ns, CQMA68 |
| 封装： | CERAMIC, QFP-68 |
| 文件页数： | 6/11页 |
| 文件大小： | 614K |
| 代理商： | WS512K32-55G2TM |
4
WS512K32-XXX
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
AC CHARACTERISTICS
(VCC= 5.0V, VSS = 0V, TA= -55°C to +125°C)
FIG. 4
AC TEST CIRCUIT
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 .
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC CHARACTERISTICS
(VCC= 5.0V, VSS = 0V, TA= -55°C to +125°C)
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0 V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
Parameter
Symbol
-15*
-17
-20
-25
-35
-45
-55
Units
Write Cycle
Min Max Min Max
Min Max
Min Max Min
Max
Min
Max Min Max
Write Cycle Time
tWC
15
17
20
25
35
45
55
n s
Chip Select to End of Write
tCW
13
15
17
25
35
50
n s
Address Valid to End of Write
tAW
13
15
17
25
35
50
n s
Data Valid to End of Write
tDW
10
11
12
13
20
25
n s
Write Pulse Width
tWP
13
15
17
25
35
40
n s
Address Setup Time
tAS
2
222
2
n s
Address Hold Time
tAH
0
000
0
5
n s
Output Active from End of Write
tOW1
2
234
4
5
n s
Write Enable to Output in High Z
tWHZ1
8
9
11
13
15
20
n s
Data Hold Time
tDH
0
000
0
n s
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice.
1. This parameter is guaranteed by design but not tested.
2 . The Address Setup Time of minimum 2ns is for the G2T, G1U and H1 packages. tAS minimum for the G4T package is 0ns.
Parameter
Symbol
-15*
-17
-20
-25
-35
-45
-55
Units
Read Cycle
Min Max Min Max
Min Max
Min
Max Min Max
Min Max
Read Cycle Time
tRC
15
17
20
25
35
45
55
n s
Address Access Time
tAA
15
17
20
25
35
45
55
n s
Output Hold from Address Change
tOH
0
0000
0
n s
Chip Select Access Time
tACS
15
17
20
25
35
45
55
n s
Output Enable to Output Valid
tOE
8
9
10
12
25
n s
Chip Select to Output in Low Z
tCLZ1
2
2244
4
n s
Output Enable to Output in Low Z
tOLZ1
0
0000
0
n s
Chip Disable to Output in High Z
tCHZ1
12
15
20
n s
Output Disable to Output in High Z
tOHZ1
12
15
20
n s
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice.
1. This parameter is guaranteed by design but not tested.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| WS512K32-55G2TMA | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x32 SRAM Module |
| WS512K32-55G2TQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SRAM|512KX32|CMOS|QFP|68PIN|CERAMIC |
| WS512K32-55G2TQA | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x32 SRAM Module |
| WS512K32-55G2UC | 制造商:Microsemi Corporation 功能描述:512K X 32 SRAM MODULE, 5V, 55NS, 68 CQFP 0.88" SQ., 0.140" H - Bulk |
| WS512K32-55G2UI | 制造商:Microsemi Corporation 功能描述:512K X 32 SRAM MODULE, 5V, 55NS, 68 CQFP 0.88" SQ., 0.140" H - Bulk |
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