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参数资料
| 型号： | WV3EG64M64ETSU403D4IMG |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | DRAM |
| 英文描述： | 64M X 64 DDR DRAM MODULE, 0.65 ns, ZMA200 |
| 封装： | ROHS COMPLIANT, SODIMM-200 |
| 文件页数： | 10/12页 |
| 文件大小： | 177K |
| 代理商： | WV3EG64M64ETSU403D4IMG |
WV3EG64M64ETSU-D4
7
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
March 2006
Rev. 0
PRELIMINARY
ICC SPECIFICATIONS AND CONDITIONS
0°C ≤ TA ≤ +70°C, DDR400: VCC = VCCQ = +2.6V ±0.1V
Symbol
Parameter/Condition
Max
Units
DDR400
@CL=3
DDR333
@CL=2.5
ICC0
OPERATING CURRENT: One device bank; Active-Precharge; tRC = tRC (MIN); tCK = tCK (MIN);
DQ, DM and DQS inputs changing once per clock cycle; Address and control inputs changing
once every two clock cycles
TBD
1,040
mA
ICC1
OPERATING CURRENT: One device bank; Active-Read-Precharge; Burst = 4; tRC = tRC (MIN);
tCK = tCK (MIN); IOUT = 0mA; Address and control inputs changing once per clock cycle
TBD
1,280
mA
ICC2P
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle; Power-down
mode; tCK = tCK (MIN); CKE = (LOW)
TBD
40
mA
ICC2F
IDLE STANDBY CURRENT: CS# = HIGH; All device banks are idle; tCK = tCK (MIN); CKE =
HIGH; Address and other control inputs changing once per clock cycle. VIN = VREF for DQ, DQS,
and DM
TBD
360
mA
ICC3P
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active; Power-down mode;
tCK = tCK (MIN); CKE = LOW
TBD
280
mA
ICC3N
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank active; tRC = tRAS
(MAX); tCK = tCK (MIN); DQ, DM and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
TBD
400
mA
ICC4R
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One device bank active; Address
and control inputs changing once per clock cycle; tCK = tCK (MIN); IOUT = 0mA
TBD
1,320
mA
ICC4W
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device bank active; Address
and control inputs changing once per clock cycle; tCK = tCK (MIN); DQ, DM, and DQS inputs
changing twice per clock cycle
TBD
1,400
mA
ICC5
AUTO REFRESH BURST CURRENT:
tREFC = tRFC (MIN)
TBD
2,320
mA
ICC6
SELF REFRESH CURRENT: CKE ≤ 0.2V
TBD
40
mA
ICC7
OPERATING CURRENT: Four device bank interleaving READs (Burst = 4) with auto precharge,
tRC = minimum tRC allowed; tCK = tCK (MIN); Address and control inputs change only during
Active READ, or WRITE commands
TBD
3,240
mA
Notes:
ICC parameters are based on MICRON components. Other DRAM manufactures parameter may be different
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相关代理商/技术参数 |
参数描述 |
|---|---|
| WV3EG64M64ETSU-D3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR SDRAM UNBUFFERED |
| WV3EG64M64ETSU-D4 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR SDRAM, UNBUFFERED, SO-DIMM |
| WV3EG64M72ETSU-D3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR SDRAM UNBUFFERED |
| WV3EG72M64ETSU335D3MG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR SDRAM UNBUFFERED |
| WV3EG72M64ETSU335D3SG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR SDRAM UNBUFFERED |
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