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参数资料
| 型号： | X24C01PIG-3.5 |
| 厂商： | IC MICROSYSTEMS SDN BHD |
| 元件分类： | DRAM |
| 英文描述： | Serial E2PROM |
| 中文描述： | 128 X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| 封装： | ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件页数： | 3/14页 |
| 文件大小： | 289K |
| 代理商： | X24C01PIG-3.5 |
X24C01
3
DEVICE OPERATION
The X24C01 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave. The
master will always initiate data transfers and provide the
clock for both transmit and receive operations. There-
fore, the X24C01 will be considered a slave in all
applications.
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW. SDA state changes during SCL HIGH are re-
served for indicating start and stop conditions. Refer to
Figures 1 and 2.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24C01 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met.
Figure 1. Data Validity
SCL
SDA
DATA STABLE
DATA
CHANGE
3837 FHD F06
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| X24C01PMG-2.7 | Serial E2PROM |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| X24C01PM | 制造商:XICOR 制造商全称:Xicor Inc. 功能描述:Serial E2PROM |
| X24C01PM-2.7 | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C01PM-3 | 制造商:XICOR 制造商全称:Xicor Inc. 功能描述:Serial E2PROM |
| X24C01PM-3.5 | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C01PMG | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:Serial E2PROM |
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