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| 型号： | X4043S8-2.7 |
| 厂商： | Intersil |
| 文件页数： | 6/24页 |
| 文件大小： | 0K |
| 描述： | IC CPU SUPERV 4K EE RST LO 8SOIC |
| 标准包装： | 100 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 低有效 |
| 复位超时： | 最小为 100 ms |
| 电压 - 阀值： | 2.62V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
X4043, X4045
Setting a V TRIP Voltage
There are two procedures used to set the threshold
voltages (V TRIP ), depending if the threshold voltage to
be stored is higher or lower than the present value. For
example, if the present V TRIP is 2.9 V and the new
V TRIP is 3.2 V, the new voltage can be stored directly
into the V TRIP cell. If however, the new setting is to be
lower than the present setting, then it is necessary to
“reset” the V TRIP voltage before setting the new value.
Setting a Higher V TRIP Voltage
To set a V TRIP threshold to a new voltage which is
higher than the present threshold, the user must apply
the desired V TRIP threshold voltage to the V CC . Then,
a programming voltage (Vp) must be applied to the
WP pin before a START condition is set up on SDA.
Next, issue on the SDA pin the Slave Address A0h,
followed by the Byte Address 01h for V TRIP and a 00h
Data Byte in order to program V TRIP . The STOP bit
following a valid write operation initiates the program-
ming sequence. WP pin must then be brought LOW to
complete the operation.
To check if the V TRIP has been set, first power-down
the device. Slowly ramp up V CC and observe when the
output, RESET (4043) or RESET (4045) switches. The
voltage at which this occurs is the V TRIP (actual) (see
Figure 2).
C ASE A
Now if the desired V TRIP is greater than the V TRIP
(actual), then add the difference between V TRIP
(desired) - V TRIP (actual) to the original V TRIP desired.
This is your new V TRIP that should be applied to V CC
and the whole sequence should be repeated again
(see Figure 5).
6
C ASE B
Now if the V TRIP (actual), is higher than the V TRIP
(desired), perform the reset sequence as described in
the next section. The new V TRIP voltage to be applied to
V CC will now be: V TRIP (desired) - (V TRIP (actual) - V TRIP
(desired)).
Note: This operation does not corrupt the memory
array.
Setting a Lower V TRIP Voltage
In order to set V TRIP to a lower voltage than the
present value, then V TRIP must first be “reset” accord-
ing to the procedure described below. Once V TRIP has
been “reset”, then V TRIP can be set to the desired volt-
age using the procedure described in “Setting a Higher
V TRIP Voltage”.
Resetting the V TRIP Voltage
To reset a V TRIP voltage, apply the programming volt-
age (Vp) to the WP pin before a START condition is
set up on SDA. Next, issue on the SDA pin the Slave
Address A0h followed by the Byte Address 03h fol-
lowed by 00h for the Data Byte in order to reset V TRIP .
The STOP bit following a valid write operation initiates
the programming sequence. Pin WP must then be
brought LOW to complete the operation.
After being reset, the value of V TRIP becomes a nomi-
nal value of 1.7V or lesser.
Note: This operation does not corrupt the memory
array.
FN8118.2
March 16, 2006
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| X4043S8I-2.7 | 功能描述:IC CPU SUPERV 4K EE RST LO 8SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:低有效 复位超时:标准传输延迟为 60 µs 电压 - 阀值:3V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:Digi-Reel® 其它名称:LM8364BALMF30DKR |
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