参数资料
| 型号： | X5001V8I-2.7A |
| 厂商： | Intersil |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR CPU 8-TSSOP |
| 标准包装： | 100 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 复位： | 低有效 |
| 复位超时： | 最小为 100 ms |
| 电压 - 阀值： | 2.92V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 管件 |
X5001
Figure 4. V TRIP Programming Sequence
V TRIP Programming
Execute
Reset V TRIP
Sequence
Set V CC = V CC Applied =
Desired V TRIP
New V CC Applied =
Old V CC Applied + Error
NO
Execute
Set V TRIP
Sequence
Apply 5V to V CC
Decrement V CC
(V CC = V CC - 50mV)
RESET pin
goes active?
YES
New V CC Applied =
Old V CC Applied - Error
Execute
Reset V TRIP
Sequence
Error < 0
Measured V TRIP -
Desired V TRIP
Error = 0
DONE
Error > 0
SPI INTERFACE
The device is designed to interface directly with the
synchronous Serial Peripheral Interface (SPI) of many
popular microcontroller families.
The device monitors the CS/WDI line and asserts
RESET output if there is no activity within user select-
able timeout period. The device also monitors the V CC
supply and asserts the RESET if V CC falls below a
preset minimum (V TRIP ). The device contains an 8-bit
watchdog timer register to control the watchdog time
out period. The current settings are accessed via the
SI and SO pins.
7
All instructions (Table 1) and data are transferred MSB
first. Data input on the SI line is latched on the first ris-
ing edge of SCK after CS goes LOW. Data is output
on the SO line by the falling edge of SCK. SCK is
static, allowing the user to stop the clock and then start
it again to resume operations where left off.
FN8125.1
May 30, 2006
相关PDF资料 |
PDF描述 |
|---|---|
| X5001V8I-2.7 | IC SUPERVISOR CPU 8-TSSOP |
| X5001S8I-2.7A | IC SUPERVISOR CPU 8-SOIC |
| EEV-HA0J101P | CAP ALUM 100UF 6.3V 20% SMD |
| ECC49DRAS | CONN EDGECARD 98POS R/A .100 SLD |
| ACC12DREF | CONN EDGECARD 24POS .100 EYELET |
相关代理商/技术参数 |
参数描述 |
|---|---|
| X5001V8I-4.5A | 功能描述:IC SUPERVISOR CPU 8-TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:推挽式，图腾柱 复位:低有效 复位超时:最小 145 ms 电压 - 阀值:2.64V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-WQFN 裸露焊盘 供应商设备封装:16-TQFN-EP（4x4） 包装:带卷 (TR) |
| X5001V8IZ-2.7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CPU Supervisor |
| X5001V8IZ-2.7A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CPU Supervisor |
| X5001V8Z-2.7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CPU Supervisor |
| X5001V8Z-2.7A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CPU Supervisor |
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