- 您现在的位置：买卖IC网 > PDF目录15081 > X5083S8IZ-2.7 (Intersil)IC SUPERVISOR CPU 8K EE 8-SOIC PDF资料下载
参数资料
| 型号： | X5083S8IZ-2.7 |
| 厂商： | Intersil |
| 文件页数： | 4/21页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR CPU 8K EE 8-SOIC |
| 标准包装： | 100 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 低有效 |
| 复位超时： | 最小为 100 ms |
| 电压 - 阀值： | 2.63V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
X5083
Ordering Information (Continued)
PART NUMBER RESET
TEMPERATURE
PKG.
(ACTIVE LOW)
X5083P-2.7
X5083PZ-2.7 (Note)
X5083PI-2.7
X5083PIZ-2.7 (Note)
X5083S8-2.7*
X5083S8Z-2.7* (Note)
X5083S8I-2.7*
X5083S8IZ-2.7* (Note)
X5083V8-2.7
X5083V8Z-2.7 (Note)
X5083V8I-2.7
X5083V8IZ-2.7 (Note)
PART MARKING
X5083P F
X5083P ZF
X5083P G
X5083P ZG
X5083 F
X5083 ZF
X5083 G
X5083 ZG
583 F
583 FZ
583G
583 GZ
V CC RANGE (V)
2.7-5.5
V TRIP RANGE
2.55-2.7
RANGE (°C)
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
PACKAGE
8 Ld PDIP
8 Ld PDIP* (Pb-free)
8 Ld PDIP
8 Ld PDIP* (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
DWG. #
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
M8.173
M8.173
M8.173
M8.173
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add "-T1" suffix for tape and reel.
*Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
Pin Description
PIN
(SOIC/
PIN
PDIP)
1
TSSOP
3
NAME
CS/WDI
FUNCTION
Chip Select Input. CS HIGH, deselects the device and the SO output pin is at a high impedance state. Unless
a nonvolatile write cycle is underway, the device will be in the standby power mode. CS LOW enables the
device, placing it in the active power mode. Prior to the start of any operation after power-up, a HIGH to LOW
transition on CS is required.
Watchdog Input. A HIGH to LOW transition on the WDI pin restarts the Watchdog timer. The absence of a
HIGH to LOW transition within the watchdog time out period results in RESET going active.
2
4
SO
Serial Output. SO is a push/pull serial data output pin. A read cycle shifts data out on this pin. The falling edge of the
serial clock (SCK) clocks the data out.
5
7
SI
Serial Input. SI is a serial data input pin. Input all opcodes, byte addresses, and memory data on this pin. The rising
edge of the serial clock (SCK) latches the input data. Send all opcodes (Table 1), addresses and data MSB first.
6
8
SCK
Serial Clock. The Serial Clock controls the serial bus timing for data input and output. The rising edge of SCK latches
in the opcode, address, or data bits present on the SI pin. The falling edge of SCK changes the data output on the SO
pin.
3
5
WP
Write Protect. When WP is LOW, nonvolatile write operations to the memory are prohibited. This “Locks” the
memory to protect it against inadvertent changes when WP is HIGH, the device operates normally.
4
8
7
6
2
1
V SS
V CC
RESET
Ground
Supply Voltage
Reset Output . RESET is an active LOW, open drain output which goes active whenever V CC falls below the
minimum V CC sense level. It will remain active until V CC rises above the minimum V CC sense level for 250ms.
RESET goes active if the watchdog timer is enabled and CS remains either HIGH or LOW longer than the
selectable watchdog time out period. A falling edge of CS will reset the watchdog timer. RESET goes active on
power-up at about 1V and remains active for 250ms after the power supply stabilizes.
4
FN8127.3
June 15, 2006
相关PDF资料 |
PDF描述 |
|---|---|
| GCC50DCSN-S288 | CONN EDGECARD 100POS .100 EXTEND |
| APSG200ELL681MJB5S | CAP ALUM 680UF 20V 20% RADIAL |
| GCC50DCSH-S288 | CONN EDGECARD 100POS .100 EXTEND |
| UVR0J223MRD6 | CAP ALUM 22000UF 6.3V 20% RADIAL |
| UPJ1K821MHD | CAP ALUM 820UF 80V 20% RADIAL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| X5083S8IZ-4.5A | 功能描述:IC CPU SUPERV 8K EEPROM 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:3.8V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:带卷 (TR) |
| X5083S8IZ-4.5AT1 | 功能描述:IC CPU SUPERV 8K EEPROM 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:3.8V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:带卷 (TR) |
| X5083S8IZT1 | 功能描述:IC SUPERVISOR CPU 8K EE 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:3.8V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:带卷 (TR) |
| X5083S8Z | 功能描述:IC CPU SUPERV 8K EEPROM 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:3.8V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:带卷 (TR) |
| X5083S8Z-2.7 | 功能描述:IC SUPERVISOR CPU 8K EE 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:3.8V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。