参数资料
型号: X5323P
厂商: Intersil
文件页数: 5/20页
文件大小: 0K
描述: IC SUPERVISOR CPU 32K EE 8-DIP
标准包装: 50
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 100 ms
电压 - 阀值: 4.38V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
X5323, X5325
Principles of Operation
Power-on Reset
Application of power to the X5323/X5325 activates a
power-on reset circuit. This circuit goes active at about 1V
and pulls the RESET/RESET pin active. This signal prevents
the system microprocessor from starting to operate with
insufficient voltage or prior to stabilization of the oscillator. As
long as RESET/RESET pin is active, the device will not
respond to any Read/Write instruction. When V CC exceeds
the device V TRIP value for 200ms (nominal) the circuit
releases RESET/RESET, allowing the processor to begin
executing code.
Low Voltage Monitoring
During operation, the X5323/X5325 monitors the V CC level
and asserts RESET/RESET if supply voltage falls below a
preset minimum V TRIP . The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brown-out condition. The RESET/RESET signal remains
active until the voltage drops below 1V. It also remains active
until V CC returns and exceeds V TRIP for 200ms.
Watchdog Timer
The watchdog timer circuit monitors the microprocessor
activity by monitoring the WDI input. The microprocessor must
toggle the CS/WDI pin periodically to prevent a
RESET/RESET signal. The CS/WDI pin must be toggled
from HIGH to LOW prior to the expiration of the watchdog
time out period. The state of two nonvolatile control bits in
the status register determine the watchdog timer period. The
microprocessor can change these watchdog bits, or they
may be “locked” by tying the WP pin LOW and setting the
To set the new V TRIP voltage, apply the desired V TRIP
threshold to the VCC pin and tie the CS/WDI pin and the WP
pin HIGH. RESET/RESET and SO pins are left
unconnected. Then apply the programming voltage V P to
both SCK and SI and pulse CS/WDI LOW then HIGH.
Remove V P and the sequence is complete.
CS
V P
SCK
V P
SI
FIGURE 1. SET V TRIP VOLTAGE
Resetting the V TRIP Voltage
This procedure sets the V TRIP to a “native” voltage level. For
example, if the current V TRIP is 4.4V and the V TRIP is reset,
the new V TRIP is something less than 1.7V. This procedure
must be used to set the voltage to a lower value.
To reset the V TRIP voltage, apply a voltage between 2.7V
and 5.5V to the VCC pin. Tie the CS/WDI pin, the WP pin,
and the SCK pin HIGH. RESET/RESET and SO pins are left
unconnected. Then apply the programming voltage V P to the
SI pin ONLY and pulse CS/WDI LOW then HIGH. Remove
V P and the sequence is complete.
CS
WPEN bit HIGH.
SCK
V CC
V CC Threshold Reset Procedure
The X5323/X5325 has a standard V CC threshold (V TRIP )
voltage. This value will not change over normal operating
and storage conditions. However, in applications where the
standard V TRIP is not exactly right, or for higher precision in
the V TRIP value, the X5323/X5325 threshold may be
adjusted.
Setting the V TRIP Voltage
This procedure sets the V TRIP to a higher voltage value. For
example, if the current V TRIP is 4.4V and the new V TRIP is
4.6V, this procedure directly makes the change. If the new
setting is lower than the current setting, then it is necessary
to reset the trip point before setting the new value.
5
SI
V P
FIGURE 2. RESET V TRIP VOLTAGE
FN8131.2
June 30, 2008
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