参数资料
| 型号： | X9251UV24Z |
| 厂商： | Intersil |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC XDCP QUAD 256TAP 50K 24-TSSOP |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 62 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 电阻（欧姆）： | 50k |
| 电路数： | 4 |
| 温度系数： | 标准值 ±300 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | 6 线 SPI（芯片选择，设备位址） |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 管件 |
6
FN8166.5
April 13, 2007
Serial Interface
The X9251 supports the SPI interface hardware conventions.
The device is accessed via the SI input with data clocked in,
on the rising SCK. CS must be LOW and the HOLD and WP
pins must be HIGH during the entire operation.
The SO and SI pins can be connected together, since they
have three state outputs. This can help to reduce system pin
count.
Identification Byte
The first byte sent to the X9251 from the host, following a CS
going HIGH to LOW, is called the Identification Byte. The
most significant four bits of the Identification Byte are a
Device Type Identifier, ID[3:0]. For the X9251, this is fixed as
0101 (refer to Table 3).
The least significant four bits of the Identification Byte are the
Slave Address bits, AD[3:0]. For the X9251, A3 is 0, A2 is 0,
A1 is the logic value at the input pin A1, and A0 is the logic
value at the input pin A0. Only the device which Slave
Address matches the incoming bits sent by the master
executes the instruction. The A1 and A0 inputs can be actively
driven by CMOS input signals or tied to VCC or VSS.
Instruction Byte
The next byte sent to the X9251 contains the instruction and
register pointer information. The four most significant bits are
used provide the instruction opcode (I[3:0]). The RB and RA
bits point to one of the four Data Registers of each associated
XDCP. The least two significant bits point to one of four Wiper
Counter Registers or DCPs.The format is shown below in
Table 4.
TABLE 3. IDENTIFICATION BYTE FORMAT
TABLE 4. INSTRUCTION BYTE FORMAT
TABLE 1. WIPER COUNTER REGISTER, WCR (8-bit), WCR[7:0]: USED TO STORE THE CURRENT WIPER POSITION (VOLATILE)
WCR7
WCR6
WCR5
WCR4
WCR3
WCR2
WCR1
WCR0
(MSB)
(LSB)
TABLE 2. DATA REGISTER, DR (8-bit), DR[7:0]: USED TO STORE WIPER POSITIONS OR DATA (NON-VOLATILE)
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
(MSB)
(LSB)
ID3
ID2
ID1
ID0
A3
A2
A1
A0
01
0100
Pin A1
Logic Value
Pin A0
Logic Value
(MSB)
(LSB)
Device Type
Identifier
Slave Address
I3
I2
I1
I0
RB
RA
P1
P0
(MSB)
(LSB)
Instruction
Register
DCP Selection
Opcode
Selection
(WCR Selection)
Data Register Selection
REGISTER
RB
RA
DR#0
0
DR#1
0
1
DR#2
1
0
DR#3
1
#: 0, 1, 2, or 3
X9251
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相关代理商/技术参数 |
参数描述 |
|---|---|
| X9251UV24Z-2.7 | 功能描述:IC XDCP QUAD 256TAP 50K 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:256 电阻（欧姆）:100k 电路数:2 温度系数:标准值 35 ppm/°C 存储器类型:易失 接口:6 线串行（芯片选择，递增，增/减） 电源电压:2.6 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
| X9252 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface |
| X9252TS24I-2.7 | 功能描述:IC XDCP QUAD 256TAP 100K 24-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 标准包装:2,500 系列:XDCP™ 接片:256 电阻（欧姆）:100k 电路数:1 温度系数:标准值 ±300 ppm/°C 存储器类型:非易失 接口:I²C（设备位址） 电源电压:2.7 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
| X9252TS24IZ-2.7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface |
| X9252TV24-2.7 | 功能描述:IC DCP QUAD 100K 256TAP 24-TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 标准包装:2,500 系列:XDCP™ 接片:256 电阻（欧姆）:100k 电路数:1 温度系数:标准值 ±300 ppm/°C 存储器类型:非易失 接口:I²C（设备位址） 电源电压:2.7 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
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