参数资料
| 型号： | X9261UV24I-2.7T1 |
| 厂商： | Intersil |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC XDCP DUAL 256TAP 50K 24-TSSOP |
| 标准包装： | 2,500 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 电阻（欧姆）： | 50k |
| 电路数： | 2 |
| 温度系数： | 标准值 ±300 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | 6 线 SPI（芯片选择，设备位址） |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
6
FN8171.4
October 12, 2006
Table 1. Wiper Counter Register, WCR (8-bit), WCR[7:0]: Used to store the current wiper position (Volatile, V).
Table 2. Data Register, DR (8-bit), Bit [7:0]: Used to store wiper positions or data (Nonvolatile, NV).
DEVICE DESCRIPTION
Instructions
IDENTIFICATION BYTE ( ID AND A )
The first byte sent to the X9261 from the host,
following a CS going HIGH to LOW, is called the
Identification Byte. The most significant four bits of the
slave address are a device type identifier. The ID[3:0]
bits is the device id for the X9261; this is fixed as
0101[B] (refer to Table 3).
The AD[3:0] bits in the ID byte is the internal slave
address. The physical device address is defined by
the state of the A3 - A0 input pins. The slave address
is externally specified by the user. The X9261
compares the serial data stream with the address
input state; a successful compare of both address bits
is required for the X9261 to successfully continue the
command sequence. Only the device which slave
address matches the incoming device address sent
by the master executes the instruction. The A3-A0
inputs can be actively driven by CMOS input signals
or tied to VCC or VSS.
INSTRUCTION BYTE ( I[3:0] )
The next byte sent to the X9261 contains the instruction
and register pointer information. The three most
significant bits are used provide the instruction opcode
(I[3:0]). The RB and RA bits point to one of the four
Data Registers of each associated XDCP. The least
significant bit points to one of two Wiper Counter
Registers or Pots.The format is shown below in Table 4.
Table 3. Identification Byte Format
Table 4. Instruction Byte Format
WCR7
WCR6
WCR5
WCR4
WCR3
WCR2
WCR1
WCR0
VVVVVVVV
(MSB)
(LSB)
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
NV
MSB
LSB
ID3
ID2
ID1
ID0
A3
A2
A1
A0
010
1
(MSB)
(LSB)
Device Type
Identifier
Slave Address
I3
I2
I1
I0
RB
RA
0
P0
(MSB)
(LSB)
Instruction
Register
Pot Selection
Opcode
Selection
(WCR Selection)
Data
X9261
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相关代理商/技术参数 |
参数描述 |
|---|---|
| X9261UV24IZ | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9261UV24IZ-2.7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9261UV24T1 | 功能描述:IC XDCP DUAL 256TAP 50K 24-TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 标准包装:2,500 系列:XDCP™ 接片:256 电阻（欧姆）:100k 电路数:1 温度系数:标准值 ±300 ppm/°C 存储器类型:非易失 接口:I²C（设备位址） 电源电压:2.7 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
| X9261UV24Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual Digitally-Controlled Potentiometers |
| X9261UV24Z-2.7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
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