参数资料
型号: X9271TV14-2.7
厂商: Intersil
文件页数: 7/22页
文件大小: 0K
描述: IC DGTAL POT 100K 256TP 14TSSOP
标准包装: 95
系列: XDCP™
接片: 256
电阻(欧姆): 100k
电路数: 1
温度系数: 标准值 ±300 ppm/°C
存储器类型: 非易失
接口: 6 线 SPI(芯片选择,设备位址)
电源电压: 2.7 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 管件
15
FN8174.3
June 23, 2011
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
A.C. TEST CONDITIONS
NOTES:
16. This parameter is not 100% tested.
17. tPUR and tPUW are the delays required from the time the (last) power supply (VCC-) is stable until the specific instruction can be issued. These
parameters are periodically sampled and are not 100% tested.
18. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Symbol
Parameter
Limits
Test Conditions
Min.
(Note 18) Typ.
Max.
(Note 18) Units
ICC1
VCC Supply Current
(Active)
400
μAfSCK = 2.5 MHz, SO = Open, VCC = 6V
Other Inputs = VSS
ICC2
VCC Supply Current
(Nonvolatile Write)
15
mA
fSCK = 2.5MHz, SO = Open, VCC = 6V
Other Inputs = VSS
ISB
VCC Current (Standby)
3
μASCK = SI = VSS, Addr. = VSS,
CS = VCC = 6V
ILI
Input Leakage Current
10
μAVIN = VSS to VCC
ILO
Output Leakage Current
10
μAVOUT = VSS to VCC
VIH
Input HIGH Voltage
VCC x 0.7
VCC + 1
V
VIL
Input LOW Voltage
-1
VCC x 0.3
V
VOL
Output LOW Voltage
0.4
V
IOL = 3mA
VOH
Output HIGH Voltage
VCC - 0.8
V
IOH = -1mA, VCC ≥ +3V
VOH
Output HIGH Voltage
VCC - 0.4
V
IOH = -0.4mA, VCC ≤ +3V
Parameter
Min.
(Note 18)
Units
Minimum Endurance
100,000
Data changes per bit per register
Data Retention
100
Years
Symbol
Test
Max.
(Note 18)
Units
Test Conditions
CIN/OUT (Note 16)
Input / Output Capacitance (SI)
8
pF
VOUT = 0V
COUT (Note 16)
Output Capacitance (SO)
8
pF
VOUT = 0V
CIN (Note 16)
Input Capacitance (A0, CS, WP, HOLD, and
SCK)
6pF
VIN = 0V
Symbol
Parameter
Min.
(Note 18)
Max.
(Note 18)
Units
tr VCC (Note 16)
VCC Power-up Rate
0.2
50
V/ms
tPUR (Note 17)
Power-up to Initiation of Read Operation
1
ms
tPUW (Note 17)
Power-up to Initiation of Write Operation
50
ms
Input Pulse Levels
VCC x 0.1 to VCC x 0.9
Input Rise and Fall Times
10ns
Input and Output Timing Level
VCC x 0.5
X9271
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