参数资料
| 型号： | X9401WV24ZT1 |
| 厂商： | Intersil |
| 文件页数： | 14/18页 |
| 文件大小： | 0K |
| 描述： | IC XDCP QUAD 64-TAP 10K 24-TSSOP |
| 标准包装： | 2,500 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 电阻（欧姆）： | 10k |
| 电路数： | 4 |
| 温度系数： | 标准值 ±300 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | 6 线 SPI（芯片选择，设备位址） |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
5
FN8190.4
October 13, 2009
or directly between the host and the Wiper Counter Register.
These instructions are:
Read Wiper Counter Register: read the current wiper
position of the selected pot,
Write Wiper Counter Register: change current wiper
position of the selected pot,
Read Data Register: read the contents of the selected
data register;
Write Data Register: write a new value to the selected data
register.
Read Status: This command returns the contents of the
WIP bit which indicates if the internal write cycle is in
progress.
The sequence of these operations is shown in Figure 4 and
Figure 5.
The final command is Increment/Decrement. It is different
from the other commands, because it’s length is
indeterminate. Once the command is issued, the master can
clock the selected wiper up and/or down in one resistor
segment steps; thereby, providing a fine tuning capability to
the host. For each SCK clock pulse (tHIGH) while SI is HIGH,
the selected wiper will move one resistor segment towards
the VH/RH terminal. Similarly, for each SCK clock pulse
while SI is LOW, the selected wiper will move one resistor
segment towards the VL/RL terminal. A detailed illustration of
the sequence and timing for this operation are shown in
Detailed Potentiometer Block Diagram
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0
REGISTER 1
REGISTER 2
REGISTER 3
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
WIPER
COUNTER
REGISTER
INC/DEC
LOGIC
UP/DN
CLK
MODIFIED SCL
UP/DN
VH/RH
VL/RL
VW/RW
IF WCR = 00[H] THEN VW/RW = VL/RL
IF WCR = 3F[H] THEN VW/RW = VH/RH
8
6
C
O
U
N
T
E
R
D
E
C
O
D
E
(WCR)
(ONE OF FOUR ARRAYS)
X9401
相关PDF资料 |
PDF描述 |
|---|---|
| M83723/75W22199 | CONN PLUG 19POS STRAIGHT W/SCKT |
| X9401WS24IZT1 | IC XDCP QUAD 64-TAP 10K 24-SOIC |
| VE-21F-MY-F1 | CONVERTER MOD DC/DC 72V 50W |
| X9400YV24ZT1 | IC XDCP QUAD 64-TAP 2.5K 24TSSOP |
| VE-21D-MY-F4 | CONVERTER MOD DC/DC 85V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| X9401YS24I-2.7 | 功能描述:IC XDCP QUAD 64-TAP 2.5K 24-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
| X9401YV24I-2.7 | 功能描述:IC XDCP QUAD 64-TAP 2.5K 24TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
| X9408 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Quad Digitally Controlled (XDCP?) Potentiometers |
| X9408_09 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Quad Digitally Controlled (XDCP?) Potentiometers |
| X9408-2.7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Low Noise/Low Power/2-Wire Bus |
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