参数资料
| 型号： | X9418YS24-2.7 |
| 厂商： | Intersil |
| 文件页数： | 13/20页 |
| 文件大小： | 0K |
| 描述： | IC XDCP DUAL 64-TAP 2.5K 24-SOIC |
| 标准包装： | 30 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 电阻（欧姆）： | 2.5k |
| 电路数： | 2 |
| 温度系数： | 标准值 ±300 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | I²C（设备位址） |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 管件 |
20
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8194.3
October 12, 2006
X9418
Thin Shrink Small Outline Package Family (TSSOP)
N
(N/2)+1
(N/2)
TOP VIEW
A
D
0.20 C
2X
B A
N/2 LEAD TIPS
B
E1
E
0.25
CAB
M
1
H
PIN #1 I.D.
0.05
e
C
0.10 C
N LEADS
SIDE VIEW
0.10
CAB
M
b
c
SEE DETAIL “X”
END VIEW
DETAIL X
A2
0° - 8°
GAUGE
PLANE
0.25
L
A1
A
L1
SEATING
PLANE
MDP0044
THIN SHRINK SMALL OUTLINE PACKAGE FAMILY
SYMBOL 14 LD 16 LD 20 LD 24 LD 28 LD TOLERANCE
A
1.20
Max
A1
0.10
±0.05
A2
0.90
±0.05
b
0.25
+0.05/-0.06
c
0.15
+0.05/-0.06
D
5.00
6.50
7.80
9.70
±0.10
E
6.40
Basic
E1
4.40
±0.10
e
0.65
Basic
L
0.60
±0.15
L1
1.00
Reference
Rev. E 12/02
NOTES:
1. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per side.
2. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm per
side.
3. Dimensions “D” and “E1” are measured at dAtum Plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| X9418YS24I | 功能描述:IC XDCP DUAL 64-TAP 2.5K 24-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
| X9418YS24I-2.7 | 功能描述:IC XDCP DUAL 64-TAP 2.5K 24-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
| X9418YS24IZ | 功能描述:IC XDCP DUAL 64TAP 2.5K 24-SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:256 电阻（欧姆）:100k 电路数:2 温度系数:标准值 35 ppm/°C 存储器类型:易失 接口:6 线串行（芯片选择，递增，增/减） 电源电压:2.6 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
| X9418YS24IZ-2.7 | 功能描述:IC XDCP DUAL 64TAP 2.5K 24-SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:256 电阻（欧姆）:100k 电路数:2 温度系数:标准值 35 ppm/°C 存储器类型:易失 接口:6 线串行（芯片选择，递增，增/减） 电源电压:2.6 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
| X9418YS24IZ-2.7) | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometers |
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