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参数资料
| 型号： | X96012V14I |
| 厂商： | Intersil |
| 文件页数： | 3/23页 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR UNIV MEM/DAC 14-TSSOP |
| 标准包装： | 95 |
| 类型： | 传感器调节器 |
| 输入类型： | 电压 |
| 输出类型： | 电压 |
| 接口： | 2 线 |
| 电流 - 电源： | 15mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 14-TSSOP |
| 包装： | 管件 |
11
FN8216.3
February 20, 2008
BYTE
MSB
LSB
80h
REGISTER
CONTROL 0
BL1
BL0
I1DS
NV1234
I2DS
ADCfiltOff
ADCIN
VRM
NON-VOLATILE
81h
CONTROL 1
VOLATILE OR
RESERVED
L1DA5
L1DA4
L1DA3
L1DA2
L1DA1
L1DA0
82h
CONTROL 2
VOLATILE OR
RESERVED
L2DA5
L2DA4
L2DA3
L2DA2
L2DA1
L2DA0
83h
CONTROL 3
VOLATILE OR
D1DA7
D1DA6
D1DA5
D1DA4
D1DA3
D1DA2
D1DA1
D1DA0
NON-VOLATILE
84h
CONTROL 4
VOLATILE OR
D2DA7
D2DA6
D2DA5
D2DA4
D2DA3
D2DA2
D2DA1
D2DA0
NON-VOLATILE
85h
CONTROL 5
NON-VOLATILE
D2DAS
L2DAS
D1DAS
L1DAS
I2FSO1
I2FSO0
I1FSO1
I1FSO0
86h
CONTROL 6
VOLATILE
WEL
RESERVED
RESERVED RESERVED
RESERVED
87h
STATUS
VOLATILE
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
7
6
5
4
3
21
0
NAME
ADDRESS
REGISTERS IN BYTE ADDRESSES 88h THROUGH 8Fh ARE RESERVED.
DIRECT ACCESS TO LUT1
DIRECT ACCESS TO LUT2
DIRECT ACCESS TO DAC1
DIRECT ACCESS TO DAC2
ADC OUTPUT
I1 AND I2 DIRECTION
0: SOURCE
1: SINK
CONTROL
1, 2, 3, 4
VOLATILITY
0: VOLATILE
1: NON-
VOLATILE
ADC INPUT
0: INTERNAL
1: EXTERNAL
VOLTAGE
BLOCK LOCK
REFERENCE
MODE
0: INTERNAL
1: EXTERNAL
00: NONE LOCKED
01: GPM LOCKED
10: GPM, LUT1, LOCKED
11: GPM, LUT1, LUT2
LOCKED
DIRECT
ACCESS
TO DAC2
0: DISABLED
1: ENABLED
DIRECT
R2 SELECTION
ACCESS
TO LUT2
0: DISABLED
1: ENABLED
ACCESS
TO DAC1
ACCESS
TO LUT1
0: DISABLED 0: DISABLED
1: ENABLED 1: ENABLED
00: EXTERNAL
01: LOW INTERNAL
10: MIDDLE INTERNAL
11: HIGH INTERNAL
R1 SELECTION
00: EXTERNAL
01: LOW INTERNAL
10: MIDDLE INTERNAL
11: HIGH INTERNAL
WRITE
ENABLE
LATCH
0: WRITE
DISABLED
1: WRITE
ENABLED
ADC
0: ON
1: OFF
FILTERING
FIGURE 4. CONTROL AND STATUS REGISTER FORMAT
X96012
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