参数资料
| 型号： | X98027L128-3.3-Z |
| 厂商： | Intersil |
| 文件页数： | 1/29页 |
| 文件大小： | 0K |
| 描述： | IC TRPL VID DIGITIZER 128MQFP |
| 标准包装： | 660 |
| 类型： | 视频数字转换器 |
| 应用： | 监控器，电视 |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
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1
FN8221.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X98027
275MHz Triple Video Digitizer with
Digital PLL
The X98027 3-channel, 8-bit Analog Front End (AFE)
contains all the components necessary to digitize analog
RGB or YUV graphics signals from personal computers,
workstations and video set-top boxes. The fully differential
analog design provides high PSRR and dynamic
performance to meet the stringent requirements of the
graphics display industry. The AFE’s 275MSPS conversion
rate supports resolutions up to QXGA at 60Hz refresh rate,
while the front end's high input bandwidth ensures sharp
images at the highest resolutions.
To minimize noise, the X98027's analog section features 2
sets of pseudo-differential RGB inputs with programmable
input bandwidth, as well as internal DC restore clamping
(including mid-scale clamping for YUV signals). This is
followed by the programmable gain/offset stage and the
three 275MSPS Analog-to-Digital Converters (ADCs).
Automatic Black Level Compensation (ABLC
) eliminates
part-to-part offset variation, ensuring perfect black level
performance in every application.
The X98027's digital PLL generates a pixel clock from the
analog source's HSYNC or SOG (Sync-On-Green) signals.
Pixel clock output frequencies range from 10MHz to 275MHz
with sampling clock jitter of 250ps peak to peak.
Features
275MSPS maximum conversion rate
Low PLL clock jitter (250ps p-p @ 275MSPS)
64 interpixel sampling positions
0.35Vp-p to 1.4Vp-p video input range
Programmable bandwidth (100MHz to 780MHz)
2 channel input multiplexer
RGB and YUV 4:2:2 output formats
5 embedded voltage regulators allow operation from
single 3.3V supply and enhance performance, isolation
Completely independent 8 bit gain/10 bit offset control
CSYNC and SOG support
Trilevel sync detection
1.2W typical PD @ 275MSPS
Pb-free plus anneal available (RoHS compliant)
Applications
LCD Monitors and Projectors
Digital TVs
Plasma Display Panels
RGB Graphics Processing
Scan Converters
Simplified Block Diagram
RGB/YPbPrIN 1
PGA
8 bit ADC
Offset
DAC
ABLC
8 or 16
x3
SOGIN1/2
HSYNCIN1/2
VSYNCIN1/2
Sync
Processing
Digital PLL
Voltage
Clamp
RGB/YPbPrIN 2
3
RGB/YUVOUT
PIXELCLKOUT
HSOUT
HSYNCOUT
AFE Configuration and Control
VSYNCOUT
+
Data Sheet
March 8, 2006
NOT
REC
OMM
END
ED F
OR
NEW
DES
IGN
S -
THE
ISL9
8001
-275
IS A
100%
COM
PAT
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IMP
ROV
ED A
LTE
RNA
TIVE
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