参数资料
型号: XC2S30-6VQ100C
厂商: Xilinx Inc
文件页数: 53/99页
文件大小: 0K
描述: IC FPGA 2.5V C-TEMP 100-PQFP
标准包装: 90
系列: Spartan®-II
LAB/CLB数: 216
逻辑元件/单元数: 972
RAM 位总计: 24576
输入/输出数: 60
门数: 30000
电源电压: 2.375 V ~ 2.625 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 100-TQFP
供应商设备封装: 100-VQFP(14x14)
Spartan-II FPGA Family: DC and Switching Characteristics
DS001-3 (v2.8) June 13, 2008
Module 3 of 4
Product Specification
57
R
IOB Input Delay Adjustments for Different Standards(1)
Input delays associated with the pad are specified for LVTTL. For other standards, adjust the delays by the values shown. A
delay adjusted in this way constitutes a worst-case limit.
Symbol
Description
Standard
Speed Grade
Units
-6
-5
Data Input Delay Adjustments
TILVTTL
Standard-specific data input delay
adjustments
LVTTL
0
ns
TILVCMOS2
LVCMOS2
–0.04
–0.05
ns
TIPCI33_3
PCI, 33 MHz, 3.3V
–0.11
–0.13
ns
TIPCI33_5
PCI, 33 MHz, 5.0V
0.26
0.30
ns
TIPCI66_3
PCI, 66 MHz, 3.3V
–0.11
–0.13
ns
TIGTL
GTL
0.20
0.24
ns
TIGTLP
GTL+
0.11
0.13
ns
TIHSTL
HSTL
0.03
0.04
ns
TISSTL2
SSTL2
–0.08
–0.09
ns
TISSTL3
SSTL3
–0.04
–0.05
ns
TICTT
CTT
0.02
ns
TIAGP
AGP
–0.06
–0.07
ns
Notes:
1.
Input timing for LVTTL is measured at 1.4V. For other I/O standards, see the table "Delay Measurement Methodology," page 60.
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