参数资料
型号: XC4005E-4PQG208C
厂商: XILINX INC
元件分类: FPGA
英文描述: FPGA, 196 CLBS, 3000 GATES, 111 MHz, PQFP208
文件页数: 6/17页
文件大小: 75K
代理商: XC4005E-4PQG208C
R
XC4000E and XC4000X Series Field Programmable Gate Arrays
6-114
February 11, 2000 (Version 1.8)
XC4000E IOB Input Switching Characteristic Guidelines (Continued)
Speed Grade
-4
-3
-2
-1
Units
Description
Symbol
Device
Min
Max
Min
Max
Min
Max
Min
Max
Setup Times (TTL Inputs)
Pad to Clock (IK),
no delay
with delay
TPICK
TPICKD
All devices
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
4.0
10.9
11.1
11.3
11.8
14.0
2.6
8.2
8.7
9.2
9.6
9.8
10.2
11.4
2.0
6.0
6.1
6.2
6.3
6.4
7.9
9.4
10.0
1.5
4.8
5.1
5.8
6.0
7.6
8.2
ns
Setup Time (CMOS Inputs)
Pad to Clock (IK), no delay
with delay
TPICKC
TPICKDC
All devices
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
6.0
12.0
12.3
12.8
13.0
13.5
16.0
3.3
8.8
9.7
9.9
10.3
10.5
10.9
12.1
2.4
6.9
8.0
8.1
8.2
8.3
10.0
12.1
2.4
5.3
5.6
6.3
6.5
7.9
8.1
ns
(TTL or CMOS)
Clock Enable (EC) to Clock
(IK), no delay
with delay
TECIK
TECIKD
All devices
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
3.5
10.4
10.7
11.1
14.0
2.5
8.1
8.5
9.1
9.5
9.7
10.1
11.3
2.1
4.3
5.6
6.7
6.9
7.1
9.0
10.6
11.0
1.5
4.3
5.0
6.0
6.5
8.0
9.0
ns
Global Set/Reset (Note 3)
Delay from GSR net
through Q to I1, I2
GSR width
GSR inactive to first active
Clock (IK) edge
TRRI
TMRW
TMRI
13.0
12.0
11.5
7.8
11.5
6.8
10.0
6.8
ns
Note 1:
Input pad setup and hold times are specied with respect to the internal clock (IK). For setup and hold times with respect to
the clock input pin, see the pin-to-pin parameters in the Guaranteed Input and Output Parameters table.
Note 2:
Voltage levels of unused pads, bonded or unbonded, must be valid logic levels. Each can be congured with the internal
pull-up (default) or pull-down resistor, or congured as a driven output, or can be driven from an external source.
Note 3:
Timing is based on the XC4005E. For other devices see the XACT timing calculator.
相关PDF资料
PDF描述
XC4005E-4PQG208I FPGA, 196 CLBS, 3000 GATES, 111 MHz, PQFP208
X25645V14I-2.7 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14
X25645S8I 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
XWD2415-TS93V 2-OUTPUT 150 W DC-DC REG PWR SUPPLY MODULE
XWD4805-TS1V 2-OUTPUT 150 W DC-DC REG PWR SUPPLY MODULE
相关代理商/技术参数
参数描述
XC4005E-4TQ144C 功能描述:IC FPGA C-TEMP 5V 4-SPD 144-TQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:XC4000E/X 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA,FCBGA 供应商设备封装:900-FCBGA(31x31) 其它名称:122-1789
XC4005E-4TQ144I 功能描述:IC FPGA I-TEMP 5V 4-SPD 144-TQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:XC4000E/X 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA,FCBGA 供应商设备封装:900-FCBGA(31x31) 其它名称:122-1789
XC4005H 制造商:XILINX 制造商全称:XILINX 功能描述:Logic Cell Array Families
XC4005H-4MQ240C 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
XC4005H-4PG223C 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)