参数资料
型号: XC4020E-2HQG240I
厂商: XILINX INC
元件分类: FPGA
英文描述: FPGA, 784 CLBS, 13000 GATES, 125 MHz, PQFP240
文件页数: 1/17页
文件大小: 75K
代理商: XC4020E-2HQG240I
R
February 11, 2000 (Version 1.8)
6-101
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
XC4000E Electrical Specications
Denition of Terms
In the following tables, some specications may be designated as Advance or Preliminary. These terms are dened as
follows:
Advance:
Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or device
families. Values are subject to change. Use as estimates, not for production.
Preliminary:
Based on preliminary characterization. Further changes are not expected.
Unmarked:
Specications not identied as either Advance or Preliminary are to be considered Final.
Except for pin-to-pin input and output parameters, the a.c. parameter delay specications included in this document are
derived from measuring internal test patterns. All specications are representative of worst-case supply voltage and junction
temperature conditions.
All specications subject to change without notice.
XC4000E DC Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Symbol
Description
Value
Units
VCC
Supply voltage relative to GND
-0.5 to +7.0
V
VIN
Input voltage relative to GND (Note 1)
-0.5 to VCC +0.5
V
VTS
Voltage applied to 3-state output (Note 1)
-0.5 to VCC +0.5
V
TSTG
Storage temperature (ambient)
-65 to +150
°C
TSOL
Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
+260
°C
TJ
Junction Temperature
Ceramic packages
+150
°C
Plastic packages
+125
°C
Note 1: Maximum DC excursion above Vcc or below Ground must be limited to either 0.5 V or 10 mA, whichever is easier to
achieve. During transitions, the device pins may undershoot to -2.0 V or overshoot to VCC + 2.0 V, provided this over or
undershoot lasts less than 10 ns and with the forcing current being limited to 200 mA.
Note:
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods
of time may affect device reliability.
Symbol
Description
Min
Max
Units
VCC
Supply voltage relative to GND, TJ = -0 °C to +85°C
Commercial
4.75
5.25
V
Supply voltage relative to GND, TJ = -40°C to +100°C
Industrial
4.5
5.5
V
Supply voltage relative to GND, TC = -55°C to +125°C
Military
4.5
5.5
V
VIH
High-Level Input Voltage
TTL inputs
2.0
VCC
V
CMOS inputs
70%
100%
VCC
VIL
Low-Level Input Voltage
TTL inputs
0
0.8
V
CMOS inputs
0
20%
VCC
TIN
Input signal transition time
250
ns
Notes:
At junction temperatures above those listed above, all delay parameters increase by 0.35% per
°C.
Input and output measurement thresholds for TTL are 1.5 V and for CMOS are 2.5 V.
相关PDF资料
PDF描述
XC4020E-3HQG240C FPGA, 784 CLBS, 13000 GATES, 125 MHz, PQFP240
XC4020E-3HQG240I FPGA, 784 CLBS, 13000 GATES, 125 MHz, PQFP240
XC4020E-4HQG240C FPGA, 784 CLBS, 13000 GATES, 111 MHz, PQFP240
XC4020E-4HQG240I FPGA, 784 CLBS, 13000 GATES, 111 MHz, PQFP240
XC4025E-4CBG228M FPGA, 1024 CLBS, 15000 GATES, 111 MHz, CQFP228
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