参数资料
型号: XC4025E-4CBG228M
厂商: XILINX INC
元件分类: FPGA
英文描述: FPGA, 1024 CLBS, 15000 GATES, 111 MHz, CQFP228
封装: CERAMIC, QFP-228
文件页数: 19/23页
文件大小: 138K
代理商: XC4025E-4CBG228M
November 21, 1997 (Version 1.3)
8-15
XC4000E Wide Decoder Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing methods specied by MIL-M-38510/605. All devices are 100%
functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed below are
representative values. For more specic, more precise, and worst-case guaranteed data, use the values reported by the
static timing analyzer (TRCE in the Xilinx Development System) and back-annotated to the simulation netlist. These path
delays, provided as a guideline, have been extracted from the static timing analyzer report. All timing parameters assume
worst-case operating conditions (supply voltage and junction temperature). Values apply to all XC4000E devices unless
otherwise noted.
The following guidelines reect worst-case values over the recommended operating conditions.
Notes:
These delays are specied from the decoder input to the decoder output.
Fewer than the specied number of pullup resistors can be used, if desired. Using fewer pullups reduces power consumption
but increases delays. Use the static timing analyzer to determine delays if fewer pullups are used.
Speed Grade
-4
Units
Description
Symbol
Device
Max
Full length, both pull-ups,
inputs from IOB I-pins
TWAF
XC4005E
XC4010E
XC4013E
XC4025E
9.5
15.0
16.0
18.0
ns
Full length, both pull-ups,
inputs from internal logic
TWAFL
XC4005E
XC4010E
XC4013E
XC4025E
12.5
18.0
19.0
21.0
ns
Half length, one pull-up,
inputs from IOB I-pins
TWAO
XC4005E
XC4010E
XC4013E
XC4025E
10.5
16.0
17.0
19.0
ns
Half length, one pull-up,
inputs from internal logic
TWAOL
XC4005E
XC4010E
XC4013E
XC4025E
12.5
18.0
19.0
21.0
ns
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