参数资料
型号: XC5VFX200T-1FFG1738CES
厂商: Xilinx Inc
文件页数: 24/91页
文件大小: 0K
描述: IC FPGA V5 FX ES 200K 1738FBGA
标准包装: 1
系列: Virtex®-5 FXT
LAB/CLB数: 15360
逻辑元件/单元数: 196608
RAM 位总计: 16809984
输入/输出数: 960
电源电压: 0.95 V ~ 1.05 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 1738-BBGA,FCBGA
供应商设备封装: 1738-FCBGA
配用: 568-5088-ND - BOARD DEMO DAC1408D750
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
30
Switching Characteristics
All values represented in this data sheet are based on
speed specification version 1.62. Switching characteristics
are specified on a per-speed-grade basis and can be
designated as Advance, Preliminary, or Production. Each
designation is defined as follows:
Advance
These specifications are based on simulations only and are
typically available soon after device design specifications
are frozen. Although speed grades with this designation are
considered relatively stable and conservative, some under-
reporting might still occur.
Preliminary
These specifications are based on complete ES
(engineering sample) silicon characterization. Devices and
speed grades with this designation are intended to give a
better indication of the expected performance of production
silicon. The probability of under-reporting delays is greatly
reduced as compared to Advance data.
Production
These specifications are released once enough production
silicon of a particular device family member has been
characterized to provide full correlation between
specifications and devices over numerous production lots.
There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes.
Typically, the slowest speed grades transition to Production
before faster speed grades.
All specifications are always representative of worst-case
supply voltage and junction temperature conditions.
Since individual family members are produced at different
times, the migration from one category to another depends
completely on the status of the fabrication process for each
device.
Table 54 correlates the current status of each Virtex-5
device on a per speed grade basis.
Testing of Switching Characteristics
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test
patterns. Listed below are representative values.
For more specific, more precise, and worst-case
guaranteed data, use the values reported by the static
timing analyzer and back-annotate to the simulation net list.
Unless otherwise noted, values apply to all Virtex-5 devices.
Table 54: Virtex-5 Device Speed Grade Designations
Device
Speed Grade Designations
Advance
Preliminary
Production
XC5VLX20T
-2, -1
XC5VLX30
-3, -2, -1
XC5VLX30T
-3, -2, -1
XC5VLX50
-3, -2, -1
XC5VLX50T
-3, -2, -1
XC5VLX85
-3, -2, -1
XC5VLX85T
-3, -2, -1
XC5VLX110
-3, -2, -1
XC5VLX110T
-3, -2, -1
XC5VLX155
-3, -2, -1
XC5VLX155T
-3, -2, -1
XC5VLX220
-2, -1
XC5VLX220T
-2, -1
XC5VLX330
-2, -1
XC5VLX330T
-2, -1
XC5VSX35T
-3, -2, -1
XC5VSX50T
-3, -2, -1
XC5VSX95T
-2, -1
XC5VSX240T
-2, -1
XC5VTX150T
-2, -1
XC5VTX240T
-2, -1
XC5VFX30T
-3, -2, -1
XC5VFX70T
-3, -2, -1
XC5VFX100T
-3, -2, -1
XC5VFX130T
-3, -2, -1
XC5VFX200T
-2, -1
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