参数资料
| 型号： | XC5VLX30T-2FFG665I |
| 厂商： | Xilinx Inc |
| 文件页数： | 13/13页 |
| 文件大小： | 0K |
| 描述： | IC FPGA VIRTEX-5LX 30K 665-FCBGA |
| 产品变化通告： | Step Intro and Pkg Change 11/March/2008 |
| 标准包装： | 1 |
| 系列： | Virtex®-5 LXT |
| LAB/CLB数： | 2400 |
| 逻辑元件/单元数： | 30720 |
| RAM 位总计： | 1327104 |
| 输入/输出数： | 360 |
| 电源电压： | 0.95 V ~ 1.05 V |
| 安装类型： | 表面贴装 |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 665-BBGA，FCBGA |
| 供应商设备封装： | 665-FCBGA |
| 配用： | 568-5088-ND - BOARD DEMO DAC1408D750 |
Virtex-5 Family Overview
DS100 (v5.0) February 6, 2009
Product Specification
9
R
Virtex-5 LXT, SXT, TXT, and FXT Platform Features
This section briefly describes blocks available only in LXT, SXT, TXT, and FXT devices.
Tri-Mode (10/100/1000 Mb/s) Ethernet MACs
Virtex-5 LXT, SXT, TXT, and FXT devices contain up to eight
embedded Ethernet MACs, two per Ethernet MAC block.
The blocks have the following characteristics:
Designed to the IEEE 802.3-2002 specification
UNH-compliance tested
RGMII/GMII Interface with SelectIO or SGMII interface
when used with RocketIO transceivers
Half or full duplex
Supports Jumbo frames
1000 Base-X PCS/PMA: When used with RocketIO
GTP transceiver, can provide complete 1000 Base-X
implementation on-chip
DCR-bus connection to microprocessors
Integrated Endpoint Blocks for PCI Express
Virtex-5 LXT, SXT, TXT, and FXT devices contain up to four
integrated Endpoint blocks. These blocks implement
Transaction Layer, Data Link Layer, and Physical Layer
functions to provide complete PCI Express Endpoint
functionality with minimal FPGA logic utilization. The blocks
have the following characteristics:
Compliant with the PCI Express Base Specification 1.1
Works in conjunction with RocketIO transceivers to
provide complete endpoint functionality
1, 4, or 8 lane support per block
Virtex-5 LXT and SXT Platform Features
This section briefly describes blocks available only in LXT and SXT devices.
RocketIO GTP Transceivers
4 - 24 channel RocketIO GTP transceivers capable of
running 100 Mb/s to 3.75 Gb/s.
Full clock and data recovery
8/16-bit or 10/20-bit datapath support
Optional 8B/10B or FPGA-based encode/decode
Integrated FIFO/elastic buffer
Channel bonding and clock correction support
Embedded 32-bit CRC generation/checking
Integrated comma-detect or A1/A2 detection
Programmable pre-emphasis (AKA transmitter
equalization)
Programmable transmitter output swing
Programmable receiver equalization
Programmable receiver termination
Embedded support for:
Out of Band (OOB) signalling: Serial ATA
Beaconing, electrical idle, and PCI Express receiver
detection
Built-in PRBS generator/checker
Virtex-5 FPGA RocketIO GTP transceivers are further
discussed in the Virtex-5 FPGA RocketIO GTP Transceiver
User Guide.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XC5VLX30T-3FF323C | 制造商:Xilinx 功能描述:IC FPGA 172 I/O 323FCBGA 制造商:Xilinx 功能描述:IC FPGA VIRTEX5LX 20K 323-FCBGA |
| XC5VLX30T-3FF665C | 制造商:Xilinx 功能描述:IC FPGA VIRTEX5LX 20K 665-FCBGA 制造商:Xilinx 功能描述:IC FPGA 360 I/O 665FCBGA |
| XC5VLX30T-3FFG323C | 功能描述:IC FPGA VIRTEX-5LX 30K 323-FCBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex®-5 LXT 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC5VLX30T-3FFG665C | 功能描述:IC FPGA VIRTEX-5LX 30K 665-FCBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex®-5 LXT 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC5VLX30T-X1FF323C | 制造商:Xilinx 功能描述: |
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