参数资料
型号: XC5VLX50-2FF1153I
厂商: Xilinx Inc
文件页数: 77/91页
文件大小: 0K
描述: IC FPGA VIRTEX-5 50K 1153FBGA
标准包装: 1
系列: Virtex®-5 LX
LAB/CLB数: 3600
逻辑元件/单元数: 46080
RAM 位总计: 1769472
输入/输出数: 560
电源电压: 0.95 V ~ 1.05 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 1153-BBGA,FCBGA
供应商设备封装: 1153-FCBGA(35x35)
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-V5-ML561-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5-ML550-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5-ML521-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-AFX-FF1153-500-G-ND - BOARD DEV VIRTEX 5 FF1153
HW-V5GBE-DK-UNI-G-ND - KIT DEV V5 LXT GIGABIT ETHERNET
122-1508-ND - EVALUATION PLATFORM VIRTEX-5
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
79
Table 96: Global Clock Setup and Hold With DCM and PLL in System-Synchronous Mode
Symbol
Description
Device
Speed Grade
Units
-3
-2
-1
Input Setup and Hold Time Relative to Global Clock Input Signal for LVCMOS25 Standard.(1)
TPSDCMPLL/
TPHDCMPLL
No Delay Global Clock and IFF(2) with
DCM and PLL in System-Synchronous Mode
XC5VLX20T
N/A
1.67
–0.64
1.78
–0.64
ns
XC5VLX30
1.72
–0.58
1.89
–0.58
2.07
–0.58
ns
XC5VLX30T
1.72
–0.58
1.89
–0.58
2.06
–0.58
ns
XC5VLX50
1.69
–0.56
1.86
–0.56
2.04
–0.56
ns
XC5VLX50T
1.69
–0.56
1.86
–0.56
2.04
–0.56
ns
XC5VLX85
1.74
–0.51
1.93
–0.51
2.13
–0.51
ns
XC5VLX85T
1.74
–0.51
1.93
–0.51
2.13
–0.51
ns
XC5VLX110
1.73
–0.45
1.93
–0.45
2.13
–0.45
ns
XC5VLX110T
1.73
–0.45
1.93
–0.45
2.13
–0.45
ns
XC5VLX155
2.14
–0.40
2.31
–0.40
2.55
–0.40
ns
XC5VLX155T
2.14
–0.40
2.31
–0.40
2.55
–0.40
ns
XC5VLX220
N/A
2.32
–0.35
2.61
–0.35
ns
XC5VLX220T
N/A
2.32
–0.35
2.61
–0.35
ns
XC5VLX330
N/A
2.29
–0.18
2.60
–0.18
ns
XC5VLX330T
N/A
2.32
–0.18
2.61
–0.18
ns
XC5VSX35T
1.78
–0.47
1.97
–0.47
2.16
–0.47
ns
XC5VSX50T
1.76
–0.45
1.94
–0.45
2.14
–0.45
ns
XC5VSX95T
N/A
2.51
–0.49
2.53
–0.49
ns
XC5VSX240T
N/A
2.39
–0.18
2.70
–0.18
ns
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