参数资料
| 型号： | XC6SLX100-L1CSG484I |
| 厂商： | Xilinx Inc |
| 文件页数： | 8/11页 |
| 文件大小： | 0K |
| 描述： | IC FPGA SPARTAN 6 101K 484CSGBGA |
| 标准包装： | 1 |
| 系列： | Spartan® 6 LX |
| LAB/CLB数： | 7911 |
| 逻辑元件/单元数： | 101261 |
| RAM 位总计： | 4939776 |
| 输入/输出数： | 338 |
| 电源电压： | 1.14 V ~ 1.26 V |
| 安装类型： | 表面贴装 |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 484-FBGA，CSPBGA |
| 供应商设备封装： | 484-CSPBGA |
Spartan-6 Family Overview
DS160 (v2.0) October 25, 2011
Product Specification
6
Block RAM
Every Spartan-6 FPGA has between 12 and 268 dual-port block RAMs, each storing 18 Kb. Each block RAM has two
completely independent ports that share only the stored data.
Synchronous Operation
Each memory access, whether read or write, is controlled by the clock. All inputs, data, address, clock enables, and write
enables are registered. The data output is always latched, retaining data until the next operation. An optional output data
pipeline register allows higher clock rates at the cost of an extra cycle of latency.
During a write operation in dual-port mode, the data output can reflect either the previously stored data, the newly written
data, or remain unchanged.
Programmable Data Width
Each port can be configured as 16K × 1, 8K × 2, 4K × 4, 2K × 9 (or 8), 1K × 18 (or 16), or 512 x 36 (or 32).
The x9, x18, and x36 configurations include parity bits. The two ports can have different aspect ratios.
Each block RAM can be divided into two completely independent 9 Kb block RAMs that can each be configured to any
aspect ratio from 8K x 1 to 512 x 18, with 256 x 36 supported in simple dual-port mode.
Memory Controller Block
Most Spartan-6 devices include dedicated memory controller blocks (MCBs), each targeting a single-chip DRAM (either
DDR, DDR2, DDR3, or LPDDR), and supporting access rates of up to 800 Mb/s.
The MCB has dedicated routing to predefined FPGA I/Os. If the MCB is not used, these I/Os are available as general
purpose FPGA I/Os. The memory controller offers a complete multi-port arbitrated interface to the logic inside the
Spartan-6 FPGA. Commands can be pushed, and data can be pushed to and pulled from independent built-in FIFOs, using
conventional FIFO control signals. The multi-port memory controller can be configured in many ways. An internal 32-, 64-,
or 128-bit data interface provides a simple and reliable interface to the MCB.
The MCB can be connected to 4-, 8-, or 16-bit external DRAM. The MCB, in many applications, provides a faster DRAM
interface compared to traditional internal data buses, which are wider and are clocked at a lower frequency. The FPGA logic
interface can be flexibly configured irrespective of the physical memory device. The MCB functionality is not supported in the
-3N speed grade.
Digital Signal Processing—DSP48A1 Slice
DSP applications use many binary multipliers and accumulators, best implemented in dedicated DSP slices. All
Spartan-6 FPGAs have many dedicated, full-custom, low-power DSP slices, combining high speed with small size, while
retaining system design flexibility.
Each DSP48A1 slice consists of a dedicated 18 × 18 bit two's complement multiplier and a 48-bit accumulator, both capable
of operating at up to 390 MHz. The DSP48A1 slice provides extensive pipelining and extension capabilities that enhance
speed and efficiency of many applications, even beyond digital signal processing, such as wide dynamic bus shifters,
memory address generators, wide bus multiplexers, and memory-mapped I/O register files. The accumulator can also be
used as a synchronous up/down counter. The multiplier can perform barrel shifting.
相关PDF资料 |
PDF描述 |
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| XC6SLX100-2FGG676I | IC FPGA SPARTAN 6 101K 676FGGBGA |
| ASC44DRYN-S734 | CONN EDGECARD 88POS DIP .100 SLD |
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| XC2V500-4FGG256C | IC VIRTEX-II FPGA 500K 256-FBGA |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XC6SLX100-L1FG484C | 制造商:Xilinx 功能描述:FPGA SPARTAN?-6 FAMILY 101261 CELLS 45NM (CMOS) TECHNOLOGY 1 - Trays 制造商:Xilinx 功能描述:IC FPGA 326 I/O 484FBGA |
| XC6SLX100-L1FG484I | 功能描述:IC FPGA SPARTAN 6 484FGGBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan® 6 LX 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC6SLX100-L1FG676C | 制造商:Xilinx 功能描述:FPGA SPARTAN?-6 FAMILY 101261 CELLS 45NM (CMOS) TECHNOLOGY 1 - Trays 制造商:Xilinx 功能描述:IC FPGA 480 I/O 676FCBGA 制造商:Xilinx 功能描述:IC FPGA SPARTAN 6 101K 676BGA |
| XC6SLX100-L1FG676I | 功能描述:IC FPGA SPARTAN 6 676FGGBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan® 6 LX 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC6SLX100-L1FGG484C | 功能描述:IC FPGA SPARTAN 6 101K 484FGGBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan® 6 LX 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
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