参数资料
型号: XC6SLX9-L1CPG196I
厂商: Xilinx Inc
文件页数: 2/11页
文件大小: 0K
描述: IC FPAG SPARTAN 6 9K 196CPGBGA
标准包装: 1
系列: Spartan® 6 LX
LAB/CLB数: 715
逻辑元件/单元数: 9152
RAM 位总计: 589824
输入/输出数: 106
电源电压: 1.14 V ~ 1.26 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 196-TFBGA,CSBGA
供应商设备封装: 196-CSBGA
Spartan-6 Family Overview
DS160 (v2.0) October 25, 2011
Product Specification
10
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03/03/10
1.4
Updated the slice counts for the LX25 and LX25T in Table 1. Revised the Dynamic Reconfiguration
Port section. Added to the Spread-Spectrum Clocking section. Changed the PLL VCO maximum
frequency to 1080 MHz and the DSP48A1 slice maximum frequency to 320 MHz due to the addition
of the -4 speed specification. Clarified configurations in the Programmable Data Width section.
Updated Low-Power Gigabit Transceiver operating rate.
08/02/10
1.5
Updated data transfer rate per differential I/O from 1,050 Mb/s to 1,080 Mb/s in Summary of Spartan-6
FPGA Features. Added the -3N speed grade to appropriate section throughout the document,
including Figure 1. Updated category in Table 2 from Size to Body Size. Updated the Configuration
section with SPI and BPI interface information. Removed the Dynamic Reconfiguration Port section.
Updated the operating speed of the DSP48A1 slice multiplier and accumulator to 390 MHz in Digital
11/05/10
1.6
transceiver data rate to 3.2 Gb/s. Updated the notes in Figure 1. Added
DS170, XA Spartan-6
Automotive FPGA Family Overview to the Spartan-6 FPGA Documentation.
03/21/11
1.7
Updated from Advance to Preliminary Specification. Removed -4 speed grade from Summary of
10/25/11
2.0
Updated from Preliminary Specification to Production Specification. Updated Configuration, including
the range of configuration bits to 3 Mb and 33 Mb, and Input and Output Delay. Updated Spartan-6
(DS172) to list of documentation.
Date
Version
Description of Revisions
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